1*9b358af7SRob Herring# SPDX-License-Identifier: GPL-2.0
2*9b358af7SRob Herring%YAML 1.2
3*9b358af7SRob Herring---
4*9b358af7SRob Herring$id: http://devicetree.org/schemas/mux/gpio-mux.yaml#
5*9b358af7SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml#
6*9b358af7SRob Herring
7*9b358af7SRob Herringtitle: GPIO-based multiplexer controller bindings
8*9b358af7SRob Herring
9*9b358af7SRob Herringmaintainers:
10*9b358af7SRob Herring  - Peter Rosin <peda@axentia.se>
11*9b358af7SRob Herring
12*9b358af7SRob Herringdescription: |+
13*9b358af7SRob Herring  Define what GPIO pins are used to control a multiplexer. Or several
14*9b358af7SRob Herring  multiplexers, if the same pins control more than one multiplexer.
15*9b358af7SRob Herring
16*9b358af7SRob Herring  The multiplexer state is defined as the number represented by the
17*9b358af7SRob Herring  multiplexer GPIO pins, where the first pin is the least significant
18*9b358af7SRob Herring  bit. An active pin is a binary 1, an inactive pin is a binary 0.
19*9b358af7SRob Herring
20*9b358af7SRob Herringproperties:
21*9b358af7SRob Herring  compatible:
22*9b358af7SRob Herring    const: gpio-mux
23*9b358af7SRob Herring
24*9b358af7SRob Herring  mux-gpios:
25*9b358af7SRob Herring    description:
26*9b358af7SRob Herring      List of gpios used to control the multiplexer, least significant bit first.
27*9b358af7SRob Herring
28*9b358af7SRob Herring  '#mux-control-cells':
29*9b358af7SRob Herring    const: 0
30*9b358af7SRob Herring
31*9b358af7SRob Herring  idle-state:
32*9b358af7SRob Herring    default: -1
33*9b358af7SRob Herring
34*9b358af7SRob Herringrequired:
35*9b358af7SRob Herring  - compatible
36*9b358af7SRob Herring  - mux-gpios
37*9b358af7SRob Herring  - "#mux-control-cells"
38*9b358af7SRob Herring
39*9b358af7SRob HerringadditionalProperties: false
40*9b358af7SRob Herring
41*9b358af7SRob Herringexamples:
42*9b358af7SRob Herring  - |
43*9b358af7SRob Herring    #include <dt-bindings/gpio/gpio.h>
44*9b358af7SRob Herring
45*9b358af7SRob Herring    mux: mux-controller {
46*9b358af7SRob Herring        compatible = "gpio-mux";
47*9b358af7SRob Herring        #mux-control-cells = <0>;
48*9b358af7SRob Herring
49*9b358af7SRob Herring        mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
50*9b358af7SRob Herring              <&pioA 1 GPIO_ACTIVE_HIGH>;
51*9b358af7SRob Herring    };
52*9b358af7SRob Herring
53*9b358af7SRob Herring    adc-mux {
54*9b358af7SRob Herring        compatible = "io-channel-mux";
55*9b358af7SRob Herring        io-channels = <&adc 0>;
56*9b358af7SRob Herring        io-channel-names = "parent";
57*9b358af7SRob Herring
58*9b358af7SRob Herring        mux-controls = <&mux>;
59*9b358af7SRob Herring
60*9b358af7SRob Herring        channels = "sync-1", "in", "out", "sync-2";
61*9b358af7SRob Herring    };
62*9b358af7SRob Herring
63*9b358af7SRob Herring    i2c-mux {
64*9b358af7SRob Herring        compatible = "i2c-mux";
65*9b358af7SRob Herring        i2c-parent = <&i2c1>;
66*9b358af7SRob Herring
67*9b358af7SRob Herring        mux-controls = <&mux>;
68*9b358af7SRob Herring
69*9b358af7SRob Herring        #address-cells = <1>;
70*9b358af7SRob Herring        #size-cells = <0>;
71*9b358af7SRob Herring
72*9b358af7SRob Herring        i2c@0 {
73*9b358af7SRob Herring            reg = <0>;
74*9b358af7SRob Herring            #address-cells = <1>;
75*9b358af7SRob Herring            #size-cells = <0>;
76*9b358af7SRob Herring
77*9b358af7SRob Herring            ssd1307: oled@3c {
78*9b358af7SRob Herring                reg = <0x3c>;
79*9b358af7SRob Herring            };
80*9b358af7SRob Herring        };
81*9b358af7SRob Herring
82*9b358af7SRob Herring        i2c@3 {
83*9b358af7SRob Herring            reg = <3>;
84*9b358af7SRob Herring            #address-cells = <1>;
85*9b358af7SRob Herring            #size-cells = <0>;
86*9b358af7SRob Herring
87*9b358af7SRob Herring            pca9555: pca9555@20 {
88*9b358af7SRob Herring                reg = <0x20>;
89*9b358af7SRob Herring            };
90*9b358af7SRob Herring        };
91*9b358af7SRob Herring    };
92*9b358af7SRob Herring...
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