1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mtd/renesas-nandc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas R-Car Gen3 & RZ/N1x NAND flash controller device tree bindings 8 9maintainers: 10 - Miquel Raynal <miquel.raynal@bootlin.com> 11 12allOf: 13 - $ref: "nand-controller.yaml" 14 15properties: 16 compatible: 17 oneOf: 18 - items: 19 - enum: 20 - renesas,r9a06g032-nandc 21 - const: renesas,rzn1-nandc 22 23 reg: 24 maxItems: 1 25 26 interrupts: 27 maxItems: 1 28 29 clocks: 30 items: 31 - description: APB host controller clock 32 - description: External NAND bus clock 33 34 clock-names: 35 items: 36 - const: hclk 37 - const: eclk 38 39required: 40 - compatible 41 - reg 42 - clocks 43 - clock-names 44 - interrupts 45 46unevaluatedProperties: false 47 48examples: 49 - | 50 #include <dt-bindings/interrupt-controller/arm-gic.h> 51 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 52 53 nand-controller@40102000 { 54 compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc"; 55 reg = <0x40102000 0x2000>; 56 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 57 clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>; 58 clock-names = "hclk", "eclk"; 59 #address-cells = <1>; 60 #size-cells = <0>; 61 }; 62