1*5f327f08SManivannan Sadhasivam# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*5f327f08SManivannan Sadhasivam%YAML 1.2 3*5f327f08SManivannan Sadhasivam--- 4*5f327f08SManivannan Sadhasivam$id: http://devicetree.org/schemas/mtd/partitions/qcom,smem-part.yaml# 5*5f327f08SManivannan Sadhasivam$schema: http://devicetree.org/meta-schemas/core.yaml# 6*5f327f08SManivannan Sadhasivam 7*5f327f08SManivannan Sadhasivamtitle: Qualcomm SMEM NAND flash partition parser binding 8*5f327f08SManivannan Sadhasivam 9*5f327f08SManivannan Sadhasivammaintainers: 10*5f327f08SManivannan Sadhasivam - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 11*5f327f08SManivannan Sadhasivam 12*5f327f08SManivannan Sadhasivamdescription: | 13*5f327f08SManivannan Sadhasivam The Qualcomm SoCs supporting the NAND controller interface features a Shared 14*5f327f08SManivannan Sadhasivam Memory (SMEM) based partition table scheme. The maximum partitions supported 15*5f327f08SManivannan Sadhasivam varies between partition table revisions. V3 supports maximum 16 partitions 16*5f327f08SManivannan Sadhasivam and V4 supports 48 partitions. 17*5f327f08SManivannan Sadhasivam 18*5f327f08SManivannan Sadhasivamproperties: 19*5f327f08SManivannan Sadhasivam compatible: 20*5f327f08SManivannan Sadhasivam const: qcom,smem-part 21*5f327f08SManivannan Sadhasivam 22*5f327f08SManivannan Sadhasivamrequired: 23*5f327f08SManivannan Sadhasivam - compatible 24*5f327f08SManivannan Sadhasivam 25*5f327f08SManivannan SadhasivamadditionalProperties: false 26*5f327f08SManivannan Sadhasivam 27*5f327f08SManivannan Sadhasivamexamples: 28*5f327f08SManivannan Sadhasivam - | 29*5f327f08SManivannan Sadhasivam flash { 30*5f327f08SManivannan Sadhasivam partitions { 31*5f327f08SManivannan Sadhasivam compatible = "qcom,smem-part"; 32*5f327f08SManivannan Sadhasivam }; 33*5f327f08SManivannan Sadhasivam }; 34