1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NAND Chip and NAND Controller Generic Binding
8
9maintainers:
10  - Miquel Raynal <miquel.raynal@bootlin.com>
11  - Richard Weinberger <richard@nod.at>
12
13description: |
14  The NAND controller should be represented with its own DT node, and
15  all NAND chips attached to this controller should be defined as
16  children nodes of the NAND controller. This representation should be
17  enforced even for simple controllers supporting only one chip.
18
19  The ECC strength and ECC step size properties define the user
20  desires in terms of correction capability of a controller. Together,
21  they request the ECC engine to correct {strength} bit errors per
22  {size} bytes.
23
24  The interpretation of these parameters is implementation-defined, so
25  not all implementations must support all possible
26  combinations. However, implementations are encouraged to further
27  specify the value(s) they support.
28
29properties:
30  $nodename:
31    pattern: "^nand-controller(@.*)?"
32
33  "#address-cells":
34    const: 1
35
36  "#size-cells":
37    const: 0
38
39  ranges: true
40
41patternProperties:
42  "^nand@[a-f0-9]$":
43    properties:
44      reg:
45        description:
46          Contains the native Ready/Busy IDs.
47
48      nand-ecc-mode:
49        allOf:
50          - $ref: /schemas/types.yaml#/definitions/string
51          - enum: [ none, soft, hw, hw_syndrome, hw_oob_first, on-die ]
52        description:
53          Desired ECC engine, either hardware (most of the time
54          embedded in the NAND controller) or software correction
55          (Linux will handle the calculations). soft_bch is deprecated
56          and should be replaced by soft and nand-ecc-algo.
57
58      nand-ecc-algo:
59        allOf:
60          - $ref: /schemas/types.yaml#/definitions/string
61          - enum: [ hamming, bch, rs ]
62        description:
63          Desired ECC algorithm.
64
65      nand-bus-width:
66        allOf:
67          - $ref: /schemas/types.yaml#/definitions/uint32
68          - enum: [ 8, 16 ]
69          - default: 8
70        description:
71          Bus width to the NAND chip
72
73      nand-on-flash-bbt:
74        $ref: /schemas/types.yaml#/definitions/flag
75        description:
76          With this property, the OS will search the device for a Bad
77          Block Table (BBT). If not found, it will create one, reserve
78          a few blocks at the end of the device to store it and update
79          it as the device ages. Otherwise, the out-of-band area of a
80          few pages of all the blocks will be scanned at boot time to
81          find Bad Block Markers (BBM). These markers will help to
82          build a volatile BBT in RAM.
83
84      nand-ecc-strength:
85        allOf:
86          - $ref: /schemas/types.yaml#/definitions/uint32
87          - minimum: 1
88        description:
89          Maximum number of bits that can be corrected per ECC step.
90
91      nand-ecc-step-size:
92        allOf:
93          - $ref: /schemas/types.yaml#/definitions/uint32
94          - minimum: 1
95        description:
96          Number of data bytes covered by a single ECC step.
97
98      nand-ecc-maximize:
99        $ref: /schemas/types.yaml#/definitions/flag
100        description:
101          Whether or not the ECC strength should be maximized. The
102          maximum ECC strength is both controller and chip
103          dependent. The ECC engine has to select the ECC config
104          providing the best strength and taking the OOB area size
105          constraint into account. This is particularly useful when
106          only the in-band area is used by the upper layers, and you
107          want to make your NAND as reliable as possible.
108
109      nand-is-boot-medium:
110        $ref: /schemas/types.yaml#/definitions/flag
111        description:
112          Whether or not the NAND chip is a boot medium. Drivers might
113          use this information to select ECC algorithms supported by
114          the boot ROM or similar restrictions.
115
116      nand-rb:
117        $ref: /schemas/types.yaml#/definitions/uint32-array
118        description:
119          Contains the native Ready/Busy IDs.
120
121    required:
122      - reg
123
124required:
125  - "#address-cells"
126  - "#size-cells"
127
128examples:
129  - |
130    nand-controller {
131      #address-cells = <1>;
132      #size-cells = <0>;
133
134      /* controller specific properties */
135
136      nand@0 {
137        reg = <0>;
138        nand-ecc-mode = "soft";
139        nand-ecc-algo = "bch";
140
141        /* controller specific properties */
142      };
143    };
144