1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/nand-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NAND Chip and NAND Controller Generic Binding
8
9maintainers:
10  - Miquel Raynal <miquel.raynal@bootlin.com>
11  - Richard Weinberger <richard@nod.at>
12
13description: |
14  The NAND controller should be represented with its own DT node, and
15  all NAND chips attached to this controller should be defined as
16  children nodes of the NAND controller. This representation should be
17  enforced even for simple controllers supporting only one chip.
18
19  The ECC strength and ECC step size properties define the user
20  desires in terms of correction capability of a controller. Together,
21  they request the ECC engine to correct {strength} bit errors per
22  {size} bytes.
23
24  The interpretation of these parameters is implementation-defined, so
25  not all implementations must support all possible
26  combinations. However, implementations are encouraged to further
27  specify the value(s) they support.
28
29properties:
30  $nodename:
31    pattern: "^nand-controller(@.*)?"
32
33  "#address-cells":
34    const: 1
35
36  "#size-cells":
37    const: 0
38
39  ranges: true
40
41patternProperties:
42  "^nand@[a-f0-9]$":
43    type: object
44    properties:
45      reg:
46        description:
47          Contains the native Ready/Busy IDs.
48
49      nand-ecc-mode:
50        allOf:
51          - $ref: /schemas/types.yaml#/definitions/string
52          - enum: [ none, soft, hw, hw_syndrome, hw_oob_first, on-die ]
53        description:
54          Desired ECC engine, either hardware (most of the time
55          embedded in the NAND controller) or software correction
56          (Linux will handle the calculations). soft_bch is deprecated
57          and should be replaced by soft and nand-ecc-algo.
58
59      nand-ecc-algo:
60        allOf:
61          - $ref: /schemas/types.yaml#/definitions/string
62          - enum: [ hamming, bch, rs ]
63        description:
64          Desired ECC algorithm.
65
66      nand-bus-width:
67        allOf:
68          - $ref: /schemas/types.yaml#/definitions/uint32
69          - enum: [ 8, 16 ]
70          - default: 8
71        description:
72          Bus width to the NAND chip
73
74      nand-on-flash-bbt:
75        $ref: /schemas/types.yaml#/definitions/flag
76        description:
77          With this property, the OS will search the device for a Bad
78          Block Table (BBT). If not found, it will create one, reserve
79          a few blocks at the end of the device to store it and update
80          it as the device ages. Otherwise, the out-of-band area of a
81          few pages of all the blocks will be scanned at boot time to
82          find Bad Block Markers (BBM). These markers will help to
83          build a volatile BBT in RAM.
84
85      nand-ecc-strength:
86        allOf:
87          - $ref: /schemas/types.yaml#/definitions/uint32
88          - minimum: 1
89        description:
90          Maximum number of bits that can be corrected per ECC step.
91
92      nand-ecc-step-size:
93        allOf:
94          - $ref: /schemas/types.yaml#/definitions/uint32
95          - minimum: 1
96        description:
97          Number of data bytes covered by a single ECC step.
98
99      nand-ecc-maximize:
100        $ref: /schemas/types.yaml#/definitions/flag
101        description:
102          Whether or not the ECC strength should be maximized. The
103          maximum ECC strength is both controller and chip
104          dependent. The ECC engine has to select the ECC config
105          providing the best strength and taking the OOB area size
106          constraint into account. This is particularly useful when
107          only the in-band area is used by the upper layers, and you
108          want to make your NAND as reliable as possible.
109
110      nand-is-boot-medium:
111        $ref: /schemas/types.yaml#/definitions/flag
112        description:
113          Whether or not the NAND chip is a boot medium. Drivers might
114          use this information to select ECC algorithms supported by
115          the boot ROM or similar restrictions.
116
117      nand-rb:
118        $ref: /schemas/types.yaml#/definitions/uint32-array
119        description:
120          Contains the native Ready/Busy IDs.
121
122    required:
123      - reg
124
125required:
126  - "#address-cells"
127  - "#size-cells"
128
129examples:
130  - |
131    nand-controller {
132      #address-cells = <1>;
133      #size-cells = <0>;
134
135      /* controller specific properties */
136
137      nand@0 {
138        reg = <0>;
139        nand-ecc-mode = "soft";
140        nand-ecc-algo = "bch";
141
142        /* controller specific properties */
143      };
144    };
145