1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12description: |
13  Flash chips (Memory Technology Devices) are often used for solid state
14  file systems on embedded devices.
15
16properties:
17  compatible:
18    oneOf:
19      - items:
20          - enum:
21              - amd,s29gl01gp
22              - amd,s29gl032a
23              - amd,s29gl256n
24              - amd,s29gl512n
25              - arm,versatile-flash
26              - arm,vexpress-flash
27              - cortina,gemini-flash
28              - cypress,hyperflash
29              - ge,imp3a-firmware-mirror
30              - ge,imp3a-paged-flash
31              - gef,ppc9a-firmware-mirror
32              - gef,ppc9a-paged-flash
33              - gef,sbc310-firmware-mirror
34              - gef,sbc310-paged-flash
35              - gef,sbc610-firmware-mirror
36              - gef,sbc610-paged-flash
37              - intel,28f128j3
38              - intel,dt28f160
39              - intel,ixp4xx-flash
40              - intel,JS28F128
41              - intel,JS28F640
42              - intel,PC28F640P30T85
43              - numonyx,js28f00a
44              - numonyx,js28f128
45              - sst,sst39vf320
46              - xlnx,xps-mch-emc-2.00.a
47          - const: cfi-flash
48      - items:
49          - enum:
50              - cypress,cy7c1019dv33-10zsxi
51              - arm,vexpress-psram
52          - const: mtd-ram
53      - enum:
54          - cfi-flash
55          - jedec-flash
56          - mtd-ram
57          - mtd-rom
58
59  reg:
60    description: |
61      It's possible to (optionally) define multiple "reg" tuples so that
62      non-identical chips can be described in one node.
63    minItems: 1
64    maxItems: 8
65
66  bank-width:
67    description: Width (in bytes) of the bank.  Equal to the device width times
68      the number of interleaved chips.
69    $ref: /schemas/types.yaml#/definitions/uint32
70    enum: [ 1, 2, 4 ]
71
72  device-width:
73    description:
74      Width of a single mtd chip. If omitted, assumed to be equal to 'bank-width'.
75    $ref: /schemas/types.yaml#/definitions/uint32
76    enum: [ 1, 2 ]
77
78  no-unaligned-direct-access:
79    type: boolean
80    description: |
81      Disables the default direct mapping of the flash.
82
83      On some platforms (e.g. MPC5200) a direct 1:1 mapping may cause problems
84      with JFFS2 usage, as the local bus (LPB) doesn't support unaligned
85      accesses as implemented in the JFFS2 code via memcpy(). By defining
86      "no-unaligned-direct-access", the flash will not be exposed directly to
87      the MTD users (e.g. JFFS2) any more.
88
89  linux,mtd-name:
90    description:
91      Allows specifying the mtd name for retro capability with physmap-flash
92      drivers as boot loader pass the mtd partition via the old device name
93      physmap-flash.
94    $ref: /schemas/types.yaml#/definitions/string
95
96  use-advanced-sector-protection:
97    type: boolean
98    description: |
99      Enables support for the advanced sector protection (Spansion: PPB -
100      Persistent Protection Bits) locking.
101
102  erase-size:
103    description: The chip's physical erase block size in bytes.
104    $ref: /schemas/types.yaml#/definitions/uint32
105
106  addr-gpios:
107    description:
108      List of GPIO descriptors that will be used to address the MSBs address
109      lines. The order goes from LSB to MSB.
110    minItems: 1
111    maxItems: 8
112
113  '#address-cells':
114    const: 1
115
116  '#size-cells':
117    const: 1
118
119  big-endian: true
120  little-endian: true
121
122patternProperties:
123  '@[0-9a-f]+$':
124    $ref: partitions/partition.yaml
125
126required:
127  - compatible
128  - reg
129
130# FIXME: A parent bus may define timing properties
131additionalProperties: true
132
133examples:
134  - |
135
136    flash@ff000000 {
137        compatible = "cfi-flash";
138        reg = <0xff000000 0x01000000>;
139        bank-width = <4>;
140        device-width = <1>;
141
142        #address-cells = <1>;
143        #size-cells = <1>;
144        ranges = <0 0xff000000 0x01000000>;
145
146        fs@0 {
147            label = "fs";
148            reg = <0 0xf80000>;
149        };
150        firmware@f80000 {
151            label ="firmware";
152            reg = <0xf80000 0x80000>;
153            read-only;
154        };
155    };
156
157  - |
158    /* An example with multiple "reg" tuples */
159
160    flash@0 {
161        compatible = "intel,PC28F640P30T85", "cfi-flash";
162        reg = <0x00000000 0x02000000>,
163              <0x02000000 0x02000000>;
164        bank-width = <2>;
165
166        #address-cells = <1>;
167        #size-cells = <1>;
168        ranges = <0 0 0x04000000>;
169
170        partition@0 {
171            label = "test-part1";
172            reg = <0 0x04000000>;
173        };
174    };
175
176  - |
177    /* An example using SRAM */
178    bus {
179        #address-cells = <2>;
180        #size-cells = <1>;
181
182        sram@2,0 {
183            compatible = "mtd-ram";
184            reg = <2 0 0x00200000>;
185            bank-width = <2>;
186        };
187    };
188
189  - |
190    /* An example using addr-gpios */
191    #include <dt-bindings/gpio/gpio.h>
192
193    flash@20000000 {
194        compatible = "cfi-flash";
195        reg = <0x20000000 0x02000000>;
196        bank-width = <2>;
197        addr-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
198
199        #address-cells = <1>;
200        #size-cells = <1>;
201        ranges = <0 0x00000000 0x02000000>,
202                 <1 0x02000000 0x02000000>;
203
204        partition@0 {
205            label = "test-part1";
206            reg = <0 0x04000000>;
207        };
208    };
209...
210