1*3af7ade2SXiangsheng Hou# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*3af7ade2SXiangsheng Hou%YAML 1.2
3*3af7ade2SXiangsheng Hou---
4*3af7ade2SXiangsheng Hou$id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
5*3af7ade2SXiangsheng Hou$schema: http://devicetree.org/meta-schemas/core.yaml#
6*3af7ade2SXiangsheng Hou
7*3af7ade2SXiangsheng Houtitle: MediaTek(MTK) SoCs raw NAND FLASH controller (NFC)
8*3af7ade2SXiangsheng Hou
9*3af7ade2SXiangsheng Houmaintainers:
10*3af7ade2SXiangsheng Hou  - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
11*3af7ade2SXiangsheng Hou
12*3af7ade2SXiangsheng Houproperties:
13*3af7ade2SXiangsheng Hou  compatible:
14*3af7ade2SXiangsheng Hou    enum:
15*3af7ade2SXiangsheng Hou      - mediatek,mt2701-nfc
16*3af7ade2SXiangsheng Hou      - mediatek,mt2712-nfc
17*3af7ade2SXiangsheng Hou      - mediatek,mt7622-nfc
18*3af7ade2SXiangsheng Hou
19*3af7ade2SXiangsheng Hou  reg:
20*3af7ade2SXiangsheng Hou    items:
21*3af7ade2SXiangsheng Hou      - description: Base physical address and size of NFI.
22*3af7ade2SXiangsheng Hou
23*3af7ade2SXiangsheng Hou  interrupts:
24*3af7ade2SXiangsheng Hou    items:
25*3af7ade2SXiangsheng Hou      - description: NFI interrupt
26*3af7ade2SXiangsheng Hou
27*3af7ade2SXiangsheng Hou  clocks:
28*3af7ade2SXiangsheng Hou    items:
29*3af7ade2SXiangsheng Hou      - description: clock used for the controller
30*3af7ade2SXiangsheng Hou      - description: clock used for the pad
31*3af7ade2SXiangsheng Hou
32*3af7ade2SXiangsheng Hou  clock-names:
33*3af7ade2SXiangsheng Hou    items:
34*3af7ade2SXiangsheng Hou      - const: nfi_clk
35*3af7ade2SXiangsheng Hou      - const: pad_clk
36*3af7ade2SXiangsheng Hou
37*3af7ade2SXiangsheng Hou  ecc-engine:
38*3af7ade2SXiangsheng Hou    description: device-tree node of the required ECC engine.
39*3af7ade2SXiangsheng Hou    $ref: /schemas/types.yaml#/definitions/phandle
40*3af7ade2SXiangsheng Hou
41*3af7ade2SXiangsheng HoupatternProperties:
42*3af7ade2SXiangsheng Hou  "^nand@[a-f0-9]$":
43*3af7ade2SXiangsheng Hou    $ref: nand-chip.yaml#
44*3af7ade2SXiangsheng Hou    unevaluatedProperties: false
45*3af7ade2SXiangsheng Hou    properties:
46*3af7ade2SXiangsheng Hou      reg:
47*3af7ade2SXiangsheng Hou        maximum: 1
48*3af7ade2SXiangsheng Hou      nand-on-flash-bbt: true
49*3af7ade2SXiangsheng Hou      nand-ecc-mode:
50*3af7ade2SXiangsheng Hou        const: hw
51*3af7ade2SXiangsheng Hou
52*3af7ade2SXiangsheng HouallOf:
53*3af7ade2SXiangsheng Hou  - $ref: nand-controller.yaml#
54*3af7ade2SXiangsheng Hou
55*3af7ade2SXiangsheng Hou  - if:
56*3af7ade2SXiangsheng Hou      properties:
57*3af7ade2SXiangsheng Hou        compatible:
58*3af7ade2SXiangsheng Hou          contains:
59*3af7ade2SXiangsheng Hou            const: mediatek,mt2701-nfc
60*3af7ade2SXiangsheng Hou    then:
61*3af7ade2SXiangsheng Hou      patternProperties:
62*3af7ade2SXiangsheng Hou        "^nand@[a-f0-9]$":
63*3af7ade2SXiangsheng Hou          properties:
64*3af7ade2SXiangsheng Hou            nand-ecc-step-size:
65*3af7ade2SXiangsheng Hou              enum: [ 512, 1024 ]
66*3af7ade2SXiangsheng Hou            nand-ecc-strength:
67*3af7ade2SXiangsheng Hou              enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,
68*3af7ade2SXiangsheng Hou                     40, 44, 48, 52, 56, 60]
69*3af7ade2SXiangsheng Hou
70*3af7ade2SXiangsheng Hou  - if:
71*3af7ade2SXiangsheng Hou      properties:
72*3af7ade2SXiangsheng Hou        compatible:
73*3af7ade2SXiangsheng Hou          contains:
74*3af7ade2SXiangsheng Hou            const: mediatek,mt2712-nfc
75*3af7ade2SXiangsheng Hou    then:
76*3af7ade2SXiangsheng Hou      patternProperties:
77*3af7ade2SXiangsheng Hou        "^nand@[a-f0-9]$":
78*3af7ade2SXiangsheng Hou          properties:
79*3af7ade2SXiangsheng Hou            nand-ecc-step-size:
80*3af7ade2SXiangsheng Hou              enum: [ 512, 1024 ]
81*3af7ade2SXiangsheng Hou            nand-ecc-strength:
82*3af7ade2SXiangsheng Hou              enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,
83*3af7ade2SXiangsheng Hou                     40, 44, 48, 52, 56, 60, 68, 72, 80]
84*3af7ade2SXiangsheng Hou
85*3af7ade2SXiangsheng Hou  - if:
86*3af7ade2SXiangsheng Hou      properties:
87*3af7ade2SXiangsheng Hou        compatible:
88*3af7ade2SXiangsheng Hou          contains:
89*3af7ade2SXiangsheng Hou            const: mediatek,mt7622-nfc
90*3af7ade2SXiangsheng Hou    then:
91*3af7ade2SXiangsheng Hou      patternProperties:
92*3af7ade2SXiangsheng Hou        "^nand@[a-f0-9]$":
93*3af7ade2SXiangsheng Hou          properties:
94*3af7ade2SXiangsheng Hou            nand-ecc-step-size:
95*3af7ade2SXiangsheng Hou              const: 512
96*3af7ade2SXiangsheng Hou            nand-ecc-strength:
97*3af7ade2SXiangsheng Hou              enum: [4, 6, 8, 10, 12]
98*3af7ade2SXiangsheng Hou
99*3af7ade2SXiangsheng Hourequired:
100*3af7ade2SXiangsheng Hou  - compatible
101*3af7ade2SXiangsheng Hou  - reg
102*3af7ade2SXiangsheng Hou  - interrupts
103*3af7ade2SXiangsheng Hou  - clocks
104*3af7ade2SXiangsheng Hou  - clock-names
105*3af7ade2SXiangsheng Hou  - ecc-engine
106*3af7ade2SXiangsheng Hou
107*3af7ade2SXiangsheng HouunevaluatedProperties: false
108*3af7ade2SXiangsheng Hou
109*3af7ade2SXiangsheng Houexamples:
110*3af7ade2SXiangsheng Hou  - |
111*3af7ade2SXiangsheng Hou    #include <dt-bindings/clock/mt2701-clk.h>
112*3af7ade2SXiangsheng Hou    #include <dt-bindings/interrupt-controller/arm-gic.h>
113*3af7ade2SXiangsheng Hou    #include <dt-bindings/interrupt-controller/irq.h>
114*3af7ade2SXiangsheng Hou
115*3af7ade2SXiangsheng Hou    soc {
116*3af7ade2SXiangsheng Hou        #address-cells = <2>;
117*3af7ade2SXiangsheng Hou        #size-cells = <2>;
118*3af7ade2SXiangsheng Hou
119*3af7ade2SXiangsheng Hou        nand-controller@1100d000 {
120*3af7ade2SXiangsheng Hou            compatible = "mediatek,mt2701-nfc";
121*3af7ade2SXiangsheng Hou            reg = <0 0x1100d000 0 0x1000>;
122*3af7ade2SXiangsheng Hou            interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
123*3af7ade2SXiangsheng Hou            clocks = <&pericfg CLK_PERI_NFI>,
124*3af7ade2SXiangsheng Hou                     <&pericfg CLK_PERI_NFI_PAD>;
125*3af7ade2SXiangsheng Hou            clock-names = "nfi_clk", "pad_clk";
126*3af7ade2SXiangsheng Hou            ecc-engine = <&bch>;
127*3af7ade2SXiangsheng Hou            #address-cells = <1>;
128*3af7ade2SXiangsheng Hou            #size-cells = <0>;
129*3af7ade2SXiangsheng Hou
130*3af7ade2SXiangsheng Hou            nand@0 {
131*3af7ade2SXiangsheng Hou                reg = <0>;
132*3af7ade2SXiangsheng Hou
133*3af7ade2SXiangsheng Hou                nand-on-flash-bbt;
134*3af7ade2SXiangsheng Hou                nand-ecc-mode = "hw";
135*3af7ade2SXiangsheng Hou                nand-ecc-step-size = <1024>;
136*3af7ade2SXiangsheng Hou                nand-ecc-strength = <24>;
137*3af7ade2SXiangsheng Hou
138*3af7ade2SXiangsheng Hou                partitions {
139*3af7ade2SXiangsheng Hou                    compatible = "fixed-partitions";
140*3af7ade2SXiangsheng Hou                    #address-cells = <1>;
141*3af7ade2SXiangsheng Hou                    #size-cells = <1>;
142*3af7ade2SXiangsheng Hou
143*3af7ade2SXiangsheng Hou                    preloader@0 {
144*3af7ade2SXiangsheng Hou                        label = "pl";
145*3af7ade2SXiangsheng Hou                        read-only;
146*3af7ade2SXiangsheng Hou                        reg = <0x0 0x400000>;
147*3af7ade2SXiangsheng Hou                    };
148*3af7ade2SXiangsheng Hou                    android@400000 {
149*3af7ade2SXiangsheng Hou                        label = "android";
150*3af7ade2SXiangsheng Hou                        reg = <0x400000 0x12c00000>;
151*3af7ade2SXiangsheng Hou                    };
152*3af7ade2SXiangsheng Hou                };
153*3af7ade2SXiangsheng Hou            };
154*3af7ade2SXiangsheng Hou        };
155*3af7ade2SXiangsheng Hou    };
156