13af7ade2SXiangsheng Hou# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
23af7ade2SXiangsheng Hou%YAML 1.2
33af7ade2SXiangsheng Hou---
43af7ade2SXiangsheng Hou$id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
53af7ade2SXiangsheng Hou$schema: http://devicetree.org/meta-schemas/core.yaml#
63af7ade2SXiangsheng Hou
73af7ade2SXiangsheng Houtitle: MediaTek(MTK) SoCs raw NAND FLASH controller (NFC)
83af7ade2SXiangsheng Hou
93af7ade2SXiangsheng Houmaintainers:
103af7ade2SXiangsheng Hou  - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
113af7ade2SXiangsheng Hou
123af7ade2SXiangsheng Houproperties:
133af7ade2SXiangsheng Hou  compatible:
143af7ade2SXiangsheng Hou    enum:
153af7ade2SXiangsheng Hou      - mediatek,mt2701-nfc
163af7ade2SXiangsheng Hou      - mediatek,mt2712-nfc
173af7ade2SXiangsheng Hou      - mediatek,mt7622-nfc
183af7ade2SXiangsheng Hou
193af7ade2SXiangsheng Hou  reg:
203af7ade2SXiangsheng Hou    items:
213af7ade2SXiangsheng Hou      - description: Base physical address and size of NFI.
223af7ade2SXiangsheng Hou
233af7ade2SXiangsheng Hou  interrupts:
243af7ade2SXiangsheng Hou    items:
253af7ade2SXiangsheng Hou      - description: NFI interrupt
263af7ade2SXiangsheng Hou
273af7ade2SXiangsheng Hou  clocks:
283af7ade2SXiangsheng Hou    items:
293af7ade2SXiangsheng Hou      - description: clock used for the controller
303af7ade2SXiangsheng Hou      - description: clock used for the pad
313af7ade2SXiangsheng Hou
323af7ade2SXiangsheng Hou  clock-names:
333af7ade2SXiangsheng Hou    items:
343af7ade2SXiangsheng Hou      - const: nfi_clk
353af7ade2SXiangsheng Hou      - const: pad_clk
363af7ade2SXiangsheng Hou
373af7ade2SXiangsheng Hou  ecc-engine:
383af7ade2SXiangsheng Hou    description: device-tree node of the required ECC engine.
393af7ade2SXiangsheng Hou    $ref: /schemas/types.yaml#/definitions/phandle
403af7ade2SXiangsheng Hou
413af7ade2SXiangsheng HoupatternProperties:
423af7ade2SXiangsheng Hou  "^nand@[a-f0-9]$":
43*18d07864SMiquel Raynal    $ref: raw-nand-chip.yaml#
443af7ade2SXiangsheng Hou    unevaluatedProperties: false
453af7ade2SXiangsheng Hou    properties:
463af7ade2SXiangsheng Hou      reg:
473af7ade2SXiangsheng Hou        maximum: 1
483af7ade2SXiangsheng Hou      nand-ecc-mode:
493af7ade2SXiangsheng Hou        const: hw
503af7ade2SXiangsheng Hou
513af7ade2SXiangsheng HouallOf:
523af7ade2SXiangsheng Hou  - $ref: nand-controller.yaml#
533af7ade2SXiangsheng Hou
543af7ade2SXiangsheng Hou  - if:
553af7ade2SXiangsheng Hou      properties:
563af7ade2SXiangsheng Hou        compatible:
573af7ade2SXiangsheng Hou          contains:
583af7ade2SXiangsheng Hou            const: mediatek,mt2701-nfc
593af7ade2SXiangsheng Hou    then:
603af7ade2SXiangsheng Hou      patternProperties:
613af7ade2SXiangsheng Hou        "^nand@[a-f0-9]$":
623af7ade2SXiangsheng Hou          properties:
633af7ade2SXiangsheng Hou            nand-ecc-step-size:
643af7ade2SXiangsheng Hou              enum: [ 512, 1024 ]
653af7ade2SXiangsheng Hou            nand-ecc-strength:
663af7ade2SXiangsheng Hou              enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,
673af7ade2SXiangsheng Hou                     40, 44, 48, 52, 56, 60]
683af7ade2SXiangsheng Hou
693af7ade2SXiangsheng Hou  - if:
703af7ade2SXiangsheng Hou      properties:
713af7ade2SXiangsheng Hou        compatible:
723af7ade2SXiangsheng Hou          contains:
733af7ade2SXiangsheng Hou            const: mediatek,mt2712-nfc
743af7ade2SXiangsheng Hou    then:
753af7ade2SXiangsheng Hou      patternProperties:
763af7ade2SXiangsheng Hou        "^nand@[a-f0-9]$":
773af7ade2SXiangsheng Hou          properties:
783af7ade2SXiangsheng Hou            nand-ecc-step-size:
793af7ade2SXiangsheng Hou              enum: [ 512, 1024 ]
803af7ade2SXiangsheng Hou            nand-ecc-strength:
813af7ade2SXiangsheng Hou              enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,
823af7ade2SXiangsheng Hou                     40, 44, 48, 52, 56, 60, 68, 72, 80]
833af7ade2SXiangsheng Hou
843af7ade2SXiangsheng Hou  - if:
853af7ade2SXiangsheng Hou      properties:
863af7ade2SXiangsheng Hou        compatible:
873af7ade2SXiangsheng Hou          contains:
883af7ade2SXiangsheng Hou            const: mediatek,mt7622-nfc
893af7ade2SXiangsheng Hou    then:
903af7ade2SXiangsheng Hou      patternProperties:
913af7ade2SXiangsheng Hou        "^nand@[a-f0-9]$":
923af7ade2SXiangsheng Hou          properties:
933af7ade2SXiangsheng Hou            nand-ecc-step-size:
943af7ade2SXiangsheng Hou              const: 512
953af7ade2SXiangsheng Hou            nand-ecc-strength:
963af7ade2SXiangsheng Hou              enum: [4, 6, 8, 10, 12]
973af7ade2SXiangsheng Hou
983af7ade2SXiangsheng Hourequired:
993af7ade2SXiangsheng Hou  - compatible
1003af7ade2SXiangsheng Hou  - reg
1013af7ade2SXiangsheng Hou  - interrupts
1023af7ade2SXiangsheng Hou  - clocks
1033af7ade2SXiangsheng Hou  - clock-names
1043af7ade2SXiangsheng Hou  - ecc-engine
1053af7ade2SXiangsheng Hou
1063af7ade2SXiangsheng HouunevaluatedProperties: false
1073af7ade2SXiangsheng Hou
1083af7ade2SXiangsheng Houexamples:
1093af7ade2SXiangsheng Hou  - |
1103af7ade2SXiangsheng Hou    #include <dt-bindings/clock/mt2701-clk.h>
1113af7ade2SXiangsheng Hou    #include <dt-bindings/interrupt-controller/arm-gic.h>
1123af7ade2SXiangsheng Hou    #include <dt-bindings/interrupt-controller/irq.h>
1133af7ade2SXiangsheng Hou
1143af7ade2SXiangsheng Hou    soc {
1153af7ade2SXiangsheng Hou        #address-cells = <2>;
1163af7ade2SXiangsheng Hou        #size-cells = <2>;
1173af7ade2SXiangsheng Hou
1183af7ade2SXiangsheng Hou        nand-controller@1100d000 {
1193af7ade2SXiangsheng Hou            compatible = "mediatek,mt2701-nfc";
1203af7ade2SXiangsheng Hou            reg = <0 0x1100d000 0 0x1000>;
1213af7ade2SXiangsheng Hou            interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
1223af7ade2SXiangsheng Hou            clocks = <&pericfg CLK_PERI_NFI>,
1233af7ade2SXiangsheng Hou                     <&pericfg CLK_PERI_NFI_PAD>;
1243af7ade2SXiangsheng Hou            clock-names = "nfi_clk", "pad_clk";
1253af7ade2SXiangsheng Hou            ecc-engine = <&bch>;
1263af7ade2SXiangsheng Hou            #address-cells = <1>;
1273af7ade2SXiangsheng Hou            #size-cells = <0>;
1283af7ade2SXiangsheng Hou
1293af7ade2SXiangsheng Hou            nand@0 {
1303af7ade2SXiangsheng Hou                reg = <0>;
1313af7ade2SXiangsheng Hou
1323af7ade2SXiangsheng Hou                nand-on-flash-bbt;
1333af7ade2SXiangsheng Hou                nand-ecc-mode = "hw";
1343af7ade2SXiangsheng Hou                nand-ecc-step-size = <1024>;
1353af7ade2SXiangsheng Hou                nand-ecc-strength = <24>;
1363af7ade2SXiangsheng Hou
1373af7ade2SXiangsheng Hou                partitions {
1383af7ade2SXiangsheng Hou                    compatible = "fixed-partitions";
1393af7ade2SXiangsheng Hou                    #address-cells = <1>;
1403af7ade2SXiangsheng Hou                    #size-cells = <1>;
1413af7ade2SXiangsheng Hou
1423af7ade2SXiangsheng Hou                    preloader@0 {
1433af7ade2SXiangsheng Hou                        label = "pl";
1443af7ade2SXiangsheng Hou                        read-only;
1453af7ade2SXiangsheng Hou                        reg = <0x0 0x400000>;
1463af7ade2SXiangsheng Hou                    };
1473af7ade2SXiangsheng Hou                    android@400000 {
1483af7ade2SXiangsheng Hou                        label = "android";
1493af7ade2SXiangsheng Hou                        reg = <0x400000 0x12c00000>;
1503af7ade2SXiangsheng Hou                    };
1513af7ade2SXiangsheng Hou                };
1523af7ade2SXiangsheng Hou            };
1533af7ade2SXiangsheng Hou        };
1543af7ade2SXiangsheng Hou    };
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