1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale General-Purpose Media Interface (GPMI) binding
8
9maintainers:
10  - Han Xu <han.xu@nxp.com>
11
12allOf:
13  - $ref: "nand-controller.yaml"
14
15description: |
16  The GPMI nand controller provides an interface to control the NAND
17  flash chips. The device tree may optionally contain sub-nodes
18  describing partitions of the address space. See partition.txt for
19  more detail.
20
21properties:
22  compatible:
23    oneOf:
24      - enum:
25          - fsl,imx23-gpmi-nand
26          - fsl,imx28-gpmi-nand
27          - fsl,imx6q-gpmi-nand
28          - fsl,imx6sx-gpmi-nand
29          - fsl,imx7d-gpmi-nand
30      - items:
31          - enum:
32              - fsl,imx8mm-gpmi-nand
33              - fsl,imx8mn-gpmi-nand
34          - const: fsl,imx7d-gpmi-nand
35
36  reg:
37    items:
38      - description: Address and length of gpmi block.
39      - description: Address and length of bch block.
40
41  reg-names:
42    items:
43      - const: gpmi-nand
44      - const: bch
45
46  interrupts:
47    maxItems: 1
48
49  interrupt-names:
50    const: bch
51
52  dmas:
53    maxItems: 1
54
55  dma-names:
56    const: rx-tx
57
58  clocks:
59    minItems: 1
60    maxItems: 5
61    items:
62      - description: SoC gpmi io clock
63      - description: SoC gpmi apb clock
64      - description: SoC gpmi bch clock
65      - description: SoC gpmi bch apb clock
66      - description: SoC per1 bch clock
67
68  clock-names:
69    minItems: 1
70    maxItems: 5
71    items:
72      - const: gpmi_io
73      - const: gpmi_apb
74      - const: gpmi_bch
75      - const: gpmi_bch_apb
76      - const: per1_bch
77
78  fsl,use-minimum-ecc:
79    type: boolean
80    description: |
81      Protect this NAND flash with the minimum ECC strength required.
82      The required ECC strength is automatically discoverable for some
83      flash (e.g., according to the ONFI standard). However, note that
84      if this strength is not discoverable or this property is not enabled,
85      the software may chooses an implementation-defined ECC scheme.
86
87  fsl,no-blockmark-swap:
88    type: boolean
89    description: |
90      Don't swap the bad block marker from the OOB area with the byte in
91      the data area but rely on the flash based BBT for identifying bad blocks.
92      NOTE: this is only valid in conjunction with 'nand-on-flash-bbt'.
93      WARNING: on i.MX28 blockmark swapping cannot be disabled for the BootROM
94      in the FCB. Thus, partitions written from Linux with this feature turned
95      on may not be accessible by the BootROM code.
96
97required:
98  - compatible
99  - reg
100  - reg-names
101  - interrupts
102  - interrupt-names
103  - clocks
104  - clock-names
105  - dmas
106  - dma-names
107
108unevaluatedProperties: false
109
110examples:
111  - |
112    nand-controller@8000c000 {
113        #address-cells = <1>;
114        #size-cells = <0>;
115        compatible = "fsl,imx28-gpmi-nand";
116        reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
117        reg-names = "gpmi-nand", "bch";
118        interrupts = <41>;
119        interrupt-names = "bch";
120        clocks = <&clks 50>;
121        clock-names = "gpmi_io";
122        dmas = <&dma_apbh 4>;
123        dma-names = "rx-tx";
124    };
125