1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
8
9allOf:
10  - $ref: nand-controller.yaml
11
12maintainers:
13  - liang.yang@amlogic.com
14
15properties:
16  compatible:
17    enum:
18      - amlogic,meson-gxl-nfc
19      - amlogic,meson-axg-nfc
20
21  reg:
22    maxItems: 2
23
24  reg-names:
25    items:
26      - const: nfc
27      - const: emmc
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    minItems: 2
34
35  clock-names:
36    items:
37      - const: core
38      - const: device
39
40patternProperties:
41  "^nand@[0-7]$":
42    type: object
43    $ref: raw-nand-chip.yaml
44    properties:
45      reg:
46        minimum: 0
47        maximum: 1
48
49      nand-ecc-mode:
50        const: hw
51
52      nand-ecc-step-size:
53        const: 1024
54
55      nand-ecc-strength:
56        enum: [8, 16, 24, 30, 40, 50, 60]
57        description: |
58          The ECC configurations that can be supported are as follows.
59            meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
60            meson-axg-nfc 8
61
62      nand-rb:
63        maxItems: 1
64        items:
65          maximum: 0
66
67    unevaluatedProperties: false
68
69
70required:
71  - compatible
72  - reg
73  - interrupts
74  - clocks
75  - clock-names
76
77unevaluatedProperties: false
78
79examples:
80  - |
81    #include <dt-bindings/clock/axg-clkc.h>
82    #include <dt-bindings/interrupt-controller/arm-gic.h>
83    nand-controller@ffe07800 {
84      compatible = "amlogic,meson-axg-nfc";
85      reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
86      reg-names = "nfc", "emmc";
87      interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
88      clocks = <&clkc CLKID_SD_EMMC_C>,  <&clkc CLKID_FCLK_DIV2>;
89      clock-names = "core", "device";
90
91      pinctrl-0 = <&nand_pins>;
92      pinctrl-names = "default";
93
94      #address-cells = <1>;
95      #size-cells = <0>;
96
97      nand@0 {
98        reg = <0>;
99        nand-rb = <0>;
100      };
101    };
102
103...
104