1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Marvell PXA SDHCI v2/v3 bindings 8 9maintainers: 10 - Ulf Hansson <ulf.hansson@linaro.org> 11 12allOf: 13 - $ref: mmc-controller.yaml# 14 - if: 15 properties: 16 compatible: 17 contains: 18 const: marvell,armada-380-sdhci 19 then: 20 properties: 21 regs: 22 minItems: 3 23 reg-names: 24 minItems: 3 25 required: 26 - reg-names 27 else: 28 properties: 29 regs: 30 maxItems: 1 31 reg-names: 32 maxItems: 1 33 34properties: 35 compatible: 36 enum: 37 - mrvl,pxav2-mmc 38 - mrvl,pxav3-mmc 39 - marvell,armada-380-sdhci 40 41 reg: 42 minItems: 1 43 maxItems: 3 44 45 reg-names: 46 items: 47 - const: sdhci 48 - const: mbus 49 - const: conf-sdio3 50 51 interrupts: 52 maxItems: 1 53 54 clocks: 55 minItems: 1 56 maxItems: 2 57 58 clock-names: 59 minItems: 1 60 maxItems: 2 61 items: 62 - const: io 63 - const: core 64 65 mrvl,clk-delay-cycles: 66 description: Specify a number of cycles to delay for tuning. 67 $ref: /schemas/types.yaml#/definitions/uint32 68 69required: 70 - compatible 71 - reg 72 - interrupts 73 - clocks 74 - clock-names 75 76unevaluatedProperties: false 77 78examples: 79 - | 80 #include <dt-bindings/clock/berlin2.h> 81 mmc@d4280800 { 82 compatible = "mrvl,pxav3-mmc"; 83 reg = <0xd4280800 0x800>; 84 bus-width = <8>; 85 interrupts = <27>; 86 clocks = <&chip CLKID_SDIO1XIN>, <&chip CLKID_SDIO1>; 87 clock-names = "io", "core"; 88 non-removable; 89 mrvl,clk-delay-cycles = <31>; 90 }; 91 - | 92 mmc@d8000 { 93 compatible = "marvell,armada-380-sdhci"; 94 reg-names = "sdhci", "mbus", "conf-sdio3"; 95 reg = <0xd8000 0x1000>, 96 <0xdc000 0x100>, 97 <0x18454 0x4>; 98 interrupts = <0 25 0x4>; 99 clocks = <&gateclk 17>; 100 clock-names = "io"; 101 mrvl,clk-delay-cycles = <0x1F>; 102 }; 103 104... 105