1a4553772SBhupesh Sharma# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2a4553772SBhupesh Sharma 3a4553772SBhupesh Sharma%YAML 1.2 4a4553772SBhupesh Sharma--- 5a4553772SBhupesh Sharma$id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#" 6a4553772SBhupesh Sharma$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7a4553772SBhupesh Sharma 8a4553772SBhupesh Sharmatitle: Qualcomm SDHCI controller (sdhci-msm) 9a4553772SBhupesh Sharma 10a4553772SBhupesh Sharmamaintainers: 11a4553772SBhupesh Sharma - Bhupesh Sharma <bhupesh.sharma@linaro.org> 12a4553772SBhupesh Sharma 13a4553772SBhupesh Sharmadescription: 14a4553772SBhupesh Sharma Secure Digital Host Controller Interface (SDHCI) present on 15a4553772SBhupesh Sharma Qualcomm SOCs supports SD/MMC/SDIO devices. 16a4553772SBhupesh Sharma 17a4553772SBhupesh Sharmaproperties: 18a4553772SBhupesh Sharma compatible: 19a4553772SBhupesh Sharma oneOf: 208574adf5SBhupesh Sharma - enum: 218574adf5SBhupesh Sharma - qcom,sdhci-msm-v4 228574adf5SBhupesh Sharma deprecated: true 23a4553772SBhupesh Sharma - items: 24a4553772SBhupesh Sharma - enum: 25a4553772SBhupesh Sharma - qcom,apq8084-sdhci 26a4553772SBhupesh Sharma - qcom,msm8226-sdhci 27a4553772SBhupesh Sharma - qcom,msm8953-sdhci 28a4553772SBhupesh Sharma - qcom,msm8974-sdhci 29e97ee6f8SAngeloGioacchino Del Regno - qcom,msm8976-sdhci 30a4553772SBhupesh Sharma - qcom,msm8916-sdhci 31a4553772SBhupesh Sharma - qcom,msm8992-sdhci 32a4553772SBhupesh Sharma - qcom,msm8994-sdhci 33a4553772SBhupesh Sharma - qcom,msm8996-sdhci 349b538b0eSKrzysztof Kozlowski - qcom,msm8998-sdhci 358574adf5SBhupesh Sharma - const: qcom,sdhci-msm-v4 # for sdcc versions less than 5.0 368574adf5SBhupesh Sharma - items: 378574adf5SBhupesh Sharma - enum: 38a4553772SBhupesh Sharma - qcom,qcs404-sdhci 39a4553772SBhupesh Sharma - qcom,sc7180-sdhci 40a4553772SBhupesh Sharma - qcom,sc7280-sdhci 41a4553772SBhupesh Sharma - qcom,sdm630-sdhci 4207c7338fSRichard Acayan - qcom,sdm670-sdhci 43a4553772SBhupesh Sharma - qcom,sdm845-sdhci 44a4553772SBhupesh Sharma - qcom,sdx55-sdhci 45210deba2SRohit Agarwal - qcom,sdx65-sdhci 46896691f0SAdam Skladowski - qcom,sm6115-sdhci 47a4553772SBhupesh Sharma - qcom,sm6125-sdhci 48a4553772SBhupesh Sharma - qcom,sm6350-sdhci 49*ac4a171bSKonrad Dybcio - qcom,sm6375-sdhci 5017a9f73dSBhupesh Sharma - qcom,sm8150-sdhci 51a4553772SBhupesh Sharma - qcom,sm8250-sdhci 5299ce0f75SKonrad Dybcio - qcom,sm8450-sdhci 538574adf5SBhupesh Sharma - const: qcom,sdhci-msm-v5 # for sdcc version 5.0 54a4553772SBhupesh Sharma 55a4553772SBhupesh Sharma reg: 56a4553772SBhupesh Sharma minItems: 1 5754c16b52SKrzysztof Kozlowski maxItems: 4 58a4553772SBhupesh Sharma 598574adf5SBhupesh Sharma reg-names: 608574adf5SBhupesh Sharma minItems: 1 618574adf5SBhupesh Sharma maxItems: 4 628574adf5SBhupesh Sharma 63a4553772SBhupesh Sharma clocks: 64a4553772SBhupesh Sharma minItems: 3 65a4553772SBhupesh Sharma items: 66a4553772SBhupesh Sharma - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock 67a4553772SBhupesh Sharma - description: SDC MMC clock, MCLK 68a4553772SBhupesh Sharma - description: TCXO clock 69a4553772SBhupesh Sharma - description: clock for Inline Crypto Engine 70a4553772SBhupesh Sharma - description: SDCC bus voter clock 71a4553772SBhupesh Sharma - description: reference clock for RCLK delay calibration 72a4553772SBhupesh Sharma - description: sleep clock for RCLK delay calibration 73a4553772SBhupesh Sharma 74a4553772SBhupesh Sharma clock-names: 75a4553772SBhupesh Sharma minItems: 2 76a4553772SBhupesh Sharma items: 77a4553772SBhupesh Sharma - const: iface 78a4553772SBhupesh Sharma - const: core 79a4553772SBhupesh Sharma - const: xo 80a4553772SBhupesh Sharma - const: ice 81a4553772SBhupesh Sharma - const: bus 82a4553772SBhupesh Sharma - const: cal 83a4553772SBhupesh Sharma - const: sleep 84a4553772SBhupesh Sharma 85a4553772SBhupesh Sharma interrupts: 86a4553772SBhupesh Sharma maxItems: 2 87a4553772SBhupesh Sharma 88a4553772SBhupesh Sharma interrupt-names: 89a4553772SBhupesh Sharma items: 90a4553772SBhupesh Sharma - const: hc_irq 91a4553772SBhupesh Sharma - const: pwr_irq 92a4553772SBhupesh Sharma 93a4553772SBhupesh Sharma pinctrl-names: 94a4553772SBhupesh Sharma minItems: 1 95a4553772SBhupesh Sharma items: 96a4553772SBhupesh Sharma - const: default 97a4553772SBhupesh Sharma - const: sleep 98a4553772SBhupesh Sharma 99a4553772SBhupesh Sharma pinctrl-0: 100a4553772SBhupesh Sharma description: 101a4553772SBhupesh Sharma Should specify pin control groups used for this controller. 102a4553772SBhupesh Sharma 103a7c99868SIskren Chernev pinctrl-1: 104a7c99868SIskren Chernev description: 105a7c99868SIskren Chernev Should specify sleep pin control groups used for this controller. 106a7c99868SIskren Chernev 10795a4cf71SRobert Marko resets: 10895a4cf71SRobert Marko maxItems: 1 10995a4cf71SRobert Marko 110a4553772SBhupesh Sharma qcom,ddr-config: 111a4553772SBhupesh Sharma $ref: /schemas/types.yaml#/definitions/uint32 112a4553772SBhupesh Sharma description: platform specific settings for DDR_CONFIG reg. 113a4553772SBhupesh Sharma 114a4553772SBhupesh Sharma qcom,dll-config: 115a4553772SBhupesh Sharma $ref: /schemas/types.yaml#/definitions/uint32 116a4553772SBhupesh Sharma description: platform specific settings for DLL_CONFIG reg. 117a4553772SBhupesh Sharma 118a4553772SBhupesh Sharma iommus: 119a4553772SBhupesh Sharma minItems: 1 120a4553772SBhupesh Sharma maxItems: 8 121a4553772SBhupesh Sharma description: | 122a4553772SBhupesh Sharma phandle to apps_smmu node with sid mask. 123a4553772SBhupesh Sharma 124a4553772SBhupesh Sharma interconnects: 125a4553772SBhupesh Sharma items: 126a4553772SBhupesh Sharma - description: data path, sdhc to ddr 127a4553772SBhupesh Sharma - description: config path, cpu to sdhc 128a4553772SBhupesh Sharma 129a4553772SBhupesh Sharma interconnect-names: 130a4553772SBhupesh Sharma items: 131a4553772SBhupesh Sharma - const: sdhc-ddr 132a4553772SBhupesh Sharma - const: cpu-sdhc 133a4553772SBhupesh Sharma 134a4553772SBhupesh Sharma power-domains: 135a4553772SBhupesh Sharma description: A phandle to sdhci power domain node 136a4553772SBhupesh Sharma maxItems: 1 137a4553772SBhupesh Sharma 1388574adf5SBhupesh Sharma mmc-ddr-1_8v: true 1398574adf5SBhupesh Sharma 1408574adf5SBhupesh Sharma mmc-hs200-1_8v: true 1418574adf5SBhupesh Sharma 1428574adf5SBhupesh Sharma mmc-hs400-1_8v: true 1438574adf5SBhupesh Sharma 1448574adf5SBhupesh Sharma bus-width: true 1458574adf5SBhupesh Sharma 1468574adf5SBhupesh Sharma max-frequency: true 1478574adf5SBhupesh Sharma 148331753ffSBhupesh Sharma operating-points-v2: true 149331753ffSBhupesh Sharma 150a4553772SBhupesh SharmapatternProperties: 151a4553772SBhupesh Sharma '^opp-table(-[a-z0-9]+)?$': 152a4553772SBhupesh Sharma if: 153a4553772SBhupesh Sharma properties: 154a4553772SBhupesh Sharma compatible: 155a4553772SBhupesh Sharma const: operating-points-v2 156a4553772SBhupesh Sharma then: 157a4553772SBhupesh Sharma patternProperties: 158a4553772SBhupesh Sharma '^opp-?[0-9]+$': 159a4553772SBhupesh Sharma required: 160a4553772SBhupesh Sharma - required-opps 161a4553772SBhupesh Sharma 162a4553772SBhupesh Sharmarequired: 163a4553772SBhupesh Sharma - compatible 164a4553772SBhupesh Sharma - reg 165a4553772SBhupesh Sharma - clocks 166a4553772SBhupesh Sharma - clock-names 167a4553772SBhupesh Sharma - interrupts 168a4553772SBhupesh Sharma 1698574adf5SBhupesh SharmaallOf: 1708574adf5SBhupesh Sharma - $ref: mmc-controller.yaml# 1718574adf5SBhupesh Sharma 17254c16b52SKrzysztof Kozlowski - if: 17354c16b52SKrzysztof Kozlowski properties: 17454c16b52SKrzysztof Kozlowski compatible: 17554c16b52SKrzysztof Kozlowski contains: 17654c16b52SKrzysztof Kozlowski enum: 17754c16b52SKrzysztof Kozlowski - qcom,sdhci-msm-v4 17854c16b52SKrzysztof Kozlowski then: 17954c16b52SKrzysztof Kozlowski properties: 18054c16b52SKrzysztof Kozlowski reg: 18154c16b52SKrzysztof Kozlowski minItems: 2 18254c16b52SKrzysztof Kozlowski items: 18354c16b52SKrzysztof Kozlowski - description: Host controller register map 18454c16b52SKrzysztof Kozlowski - description: SD Core register map 18554c16b52SKrzysztof Kozlowski - description: CQE register map 18654c16b52SKrzysztof Kozlowski - description: Inline Crypto Engine register map 18754c16b52SKrzysztof Kozlowski reg-names: 18854c16b52SKrzysztof Kozlowski minItems: 2 18954c16b52SKrzysztof Kozlowski items: 19054c16b52SKrzysztof Kozlowski - const: hc 19154c16b52SKrzysztof Kozlowski - const: core 19254c16b52SKrzysztof Kozlowski - const: cqhci 19354c16b52SKrzysztof Kozlowski - const: ice 19454c16b52SKrzysztof Kozlowski else: 19554c16b52SKrzysztof Kozlowski properties: 19654c16b52SKrzysztof Kozlowski reg: 19754c16b52SKrzysztof Kozlowski minItems: 1 19854c16b52SKrzysztof Kozlowski items: 19954c16b52SKrzysztof Kozlowski - description: Host controller register map 20054c16b52SKrzysztof Kozlowski - description: CQE register map 20154c16b52SKrzysztof Kozlowski - description: Inline Crypto Engine register map 20254c16b52SKrzysztof Kozlowski reg-names: 20354c16b52SKrzysztof Kozlowski minItems: 1 20454c16b52SKrzysztof Kozlowski items: 20554c16b52SKrzysztof Kozlowski - const: hc 20654c16b52SKrzysztof Kozlowski - const: cqhci 20754c16b52SKrzysztof Kozlowski - const: ice 20854c16b52SKrzysztof Kozlowski 2098574adf5SBhupesh SharmaunevaluatedProperties: false 210a4553772SBhupesh Sharma 211a4553772SBhupesh Sharmaexamples: 212a4553772SBhupesh Sharma - | 213a4553772SBhupesh Sharma #include <dt-bindings/interrupt-controller/arm-gic.h> 214a4553772SBhupesh Sharma #include <dt-bindings/clock/qcom,gcc-sm8250.h> 215a4553772SBhupesh Sharma #include <dt-bindings/clock/qcom,rpmh.h> 216a4553772SBhupesh Sharma #include <dt-bindings/power/qcom-rpmpd.h> 217a4553772SBhupesh Sharma 2188574adf5SBhupesh Sharma sdhc_2: mmc@8804000 { 219a4553772SBhupesh Sharma compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 220a4553772SBhupesh Sharma reg = <0 0x08804000 0 0x1000>; 221a4553772SBhupesh Sharma 222a4553772SBhupesh Sharma interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 223a4553772SBhupesh Sharma <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 224a4553772SBhupesh Sharma interrupt-names = "hc_irq", "pwr_irq"; 225a4553772SBhupesh Sharma 226a4553772SBhupesh Sharma clocks = <&gcc GCC_SDCC2_AHB_CLK>, 227a4553772SBhupesh Sharma <&gcc GCC_SDCC2_APPS_CLK>, 228a4553772SBhupesh Sharma <&rpmhcc RPMH_CXO_CLK>; 229a4553772SBhupesh Sharma clock-names = "iface", "core", "xo"; 230a4553772SBhupesh Sharma iommus = <&apps_smmu 0x4a0 0x0>; 231a4553772SBhupesh Sharma qcom,dll-config = <0x0007642c>; 232a4553772SBhupesh Sharma qcom,ddr-config = <0x80040868>; 233a4553772SBhupesh Sharma power-domains = <&rpmhpd SM8250_CX>; 234a4553772SBhupesh Sharma 235a4553772SBhupesh Sharma operating-points-v2 = <&sdhc2_opp_table>; 236a4553772SBhupesh Sharma 237a4553772SBhupesh Sharma sdhc2_opp_table: opp-table { 238a4553772SBhupesh Sharma compatible = "operating-points-v2"; 239a4553772SBhupesh Sharma 240a4553772SBhupesh Sharma opp-19200000 { 241a4553772SBhupesh Sharma opp-hz = /bits/ 64 <19200000>; 242a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_min_svs>; 243a4553772SBhupesh Sharma }; 244a4553772SBhupesh Sharma 245a4553772SBhupesh Sharma opp-50000000 { 246a4553772SBhupesh Sharma opp-hz = /bits/ 64 <50000000>; 247a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_low_svs>; 248a4553772SBhupesh Sharma }; 249a4553772SBhupesh Sharma 250a4553772SBhupesh Sharma opp-100000000 { 251a4553772SBhupesh Sharma opp-hz = /bits/ 64 <100000000>; 252a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_svs>; 253a4553772SBhupesh Sharma }; 254a4553772SBhupesh Sharma 255a4553772SBhupesh Sharma opp-202000000 { 256a4553772SBhupesh Sharma opp-hz = /bits/ 64 <202000000>; 257a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_svs_l1>; 258a4553772SBhupesh Sharma }; 259a4553772SBhupesh Sharma }; 260a4553772SBhupesh Sharma }; 261