1a4553772SBhupesh Sharma# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2a4553772SBhupesh Sharma 3a4553772SBhupesh Sharma%YAML 1.2 4a4553772SBhupesh Sharma--- 5a4553772SBhupesh Sharma$id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#" 6a4553772SBhupesh Sharma$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7a4553772SBhupesh Sharma 8a4553772SBhupesh Sharmatitle: Qualcomm SDHCI controller (sdhci-msm) 9a4553772SBhupesh Sharma 10a4553772SBhupesh Sharmamaintainers: 11a4553772SBhupesh Sharma - Bhupesh Sharma <bhupesh.sharma@linaro.org> 12a4553772SBhupesh Sharma 13a4553772SBhupesh Sharmadescription: 14a4553772SBhupesh Sharma Secure Digital Host Controller Interface (SDHCI) present on 15a4553772SBhupesh Sharma Qualcomm SOCs supports SD/MMC/SDIO devices. 16a4553772SBhupesh Sharma 17a4553772SBhupesh Sharmaproperties: 18a4553772SBhupesh Sharma compatible: 19a4553772SBhupesh Sharma oneOf: 208574adf5SBhupesh Sharma - enum: 218574adf5SBhupesh Sharma - qcom,sdhci-msm-v4 228574adf5SBhupesh Sharma deprecated: true 23a4553772SBhupesh Sharma - items: 24a4553772SBhupesh Sharma - enum: 25a4553772SBhupesh Sharma - qcom,apq8084-sdhci 26a4553772SBhupesh Sharma - qcom,msm8226-sdhci 27a4553772SBhupesh Sharma - qcom,msm8953-sdhci 28a4553772SBhupesh Sharma - qcom,msm8974-sdhci 29a4553772SBhupesh Sharma - qcom,msm8916-sdhci 30a4553772SBhupesh Sharma - qcom,msm8992-sdhci 31a4553772SBhupesh Sharma - qcom,msm8994-sdhci 32a4553772SBhupesh Sharma - qcom,msm8996-sdhci 338574adf5SBhupesh Sharma - const: qcom,sdhci-msm-v4 # for sdcc versions less than 5.0 348574adf5SBhupesh Sharma - items: 358574adf5SBhupesh Sharma - enum: 36a4553772SBhupesh Sharma - qcom,qcs404-sdhci 37a4553772SBhupesh Sharma - qcom,sc7180-sdhci 38a4553772SBhupesh Sharma - qcom,sc7280-sdhci 39a4553772SBhupesh Sharma - qcom,sdm630-sdhci 40a4553772SBhupesh Sharma - qcom,sdm845-sdhci 41a4553772SBhupesh Sharma - qcom,sdx55-sdhci 42210deba2SRohit Agarwal - qcom,sdx65-sdhci 43a4553772SBhupesh Sharma - qcom,sm6125-sdhci 44a4553772SBhupesh Sharma - qcom,sm6350-sdhci 4517a9f73dSBhupesh Sharma - qcom,sm8150-sdhci 46a4553772SBhupesh Sharma - qcom,sm8250-sdhci 478574adf5SBhupesh Sharma - const: qcom,sdhci-msm-v5 # for sdcc version 5.0 48a4553772SBhupesh Sharma 49a4553772SBhupesh Sharma reg: 50a4553772SBhupesh Sharma minItems: 1 51*54c16b52SKrzysztof Kozlowski maxItems: 4 52a4553772SBhupesh Sharma 538574adf5SBhupesh Sharma reg-names: 548574adf5SBhupesh Sharma minItems: 1 558574adf5SBhupesh Sharma maxItems: 4 568574adf5SBhupesh Sharma 57a4553772SBhupesh Sharma clocks: 58a4553772SBhupesh Sharma minItems: 3 59a4553772SBhupesh Sharma items: 60a4553772SBhupesh Sharma - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock 61a4553772SBhupesh Sharma - description: SDC MMC clock, MCLK 62a4553772SBhupesh Sharma - description: TCXO clock 63a4553772SBhupesh Sharma - description: clock for Inline Crypto Engine 64a4553772SBhupesh Sharma - description: SDCC bus voter clock 65a4553772SBhupesh Sharma - description: reference clock for RCLK delay calibration 66a4553772SBhupesh Sharma - description: sleep clock for RCLK delay calibration 67a4553772SBhupesh Sharma 68a4553772SBhupesh Sharma clock-names: 69a4553772SBhupesh Sharma minItems: 2 70a4553772SBhupesh Sharma items: 71a4553772SBhupesh Sharma - const: iface 72a4553772SBhupesh Sharma - const: core 73a4553772SBhupesh Sharma - const: xo 74a4553772SBhupesh Sharma - const: ice 75a4553772SBhupesh Sharma - const: bus 76a4553772SBhupesh Sharma - const: cal 77a4553772SBhupesh Sharma - const: sleep 78a4553772SBhupesh Sharma 79a4553772SBhupesh Sharma interrupts: 80a4553772SBhupesh Sharma maxItems: 2 81a4553772SBhupesh Sharma 82a4553772SBhupesh Sharma interrupt-names: 83a4553772SBhupesh Sharma items: 84a4553772SBhupesh Sharma - const: hc_irq 85a4553772SBhupesh Sharma - const: pwr_irq 86a4553772SBhupesh Sharma 87a4553772SBhupesh Sharma pinctrl-names: 88a4553772SBhupesh Sharma minItems: 1 89a4553772SBhupesh Sharma items: 90a4553772SBhupesh Sharma - const: default 91a4553772SBhupesh Sharma - const: sleep 92a4553772SBhupesh Sharma 93a4553772SBhupesh Sharma pinctrl-0: 94a4553772SBhupesh Sharma description: 95a4553772SBhupesh Sharma Should specify pin control groups used for this controller. 96a4553772SBhupesh Sharma 9795a4cf71SRobert Marko resets: 9895a4cf71SRobert Marko maxItems: 1 9995a4cf71SRobert Marko 100a4553772SBhupesh Sharma qcom,ddr-config: 101a4553772SBhupesh Sharma $ref: /schemas/types.yaml#/definitions/uint32 102a4553772SBhupesh Sharma description: platform specific settings for DDR_CONFIG reg. 103a4553772SBhupesh Sharma 104a4553772SBhupesh Sharma qcom,dll-config: 105a4553772SBhupesh Sharma $ref: /schemas/types.yaml#/definitions/uint32 106a4553772SBhupesh Sharma description: platform specific settings for DLL_CONFIG reg. 107a4553772SBhupesh Sharma 108a4553772SBhupesh Sharma iommus: 109a4553772SBhupesh Sharma minItems: 1 110a4553772SBhupesh Sharma maxItems: 8 111a4553772SBhupesh Sharma description: | 112a4553772SBhupesh Sharma phandle to apps_smmu node with sid mask. 113a4553772SBhupesh Sharma 114a4553772SBhupesh Sharma interconnects: 115a4553772SBhupesh Sharma items: 116a4553772SBhupesh Sharma - description: data path, sdhc to ddr 117a4553772SBhupesh Sharma - description: config path, cpu to sdhc 118a4553772SBhupesh Sharma 119a4553772SBhupesh Sharma interconnect-names: 120a4553772SBhupesh Sharma items: 121a4553772SBhupesh Sharma - const: sdhc-ddr 122a4553772SBhupesh Sharma - const: cpu-sdhc 123a4553772SBhupesh Sharma 124a4553772SBhupesh Sharma power-domains: 125a4553772SBhupesh Sharma description: A phandle to sdhci power domain node 126a4553772SBhupesh Sharma maxItems: 1 127a4553772SBhupesh Sharma 1288574adf5SBhupesh Sharma mmc-ddr-1_8v: true 1298574adf5SBhupesh Sharma 1308574adf5SBhupesh Sharma mmc-hs200-1_8v: true 1318574adf5SBhupesh Sharma 1328574adf5SBhupesh Sharma mmc-hs400-1_8v: true 1338574adf5SBhupesh Sharma 1348574adf5SBhupesh Sharma bus-width: true 1358574adf5SBhupesh Sharma 1368574adf5SBhupesh Sharma max-frequency: true 1378574adf5SBhupesh Sharma 138a4553772SBhupesh SharmapatternProperties: 139a4553772SBhupesh Sharma '^opp-table(-[a-z0-9]+)?$': 140a4553772SBhupesh Sharma if: 141a4553772SBhupesh Sharma properties: 142a4553772SBhupesh Sharma compatible: 143a4553772SBhupesh Sharma const: operating-points-v2 144a4553772SBhupesh Sharma then: 145a4553772SBhupesh Sharma patternProperties: 146a4553772SBhupesh Sharma '^opp-?[0-9]+$': 147a4553772SBhupesh Sharma required: 148a4553772SBhupesh Sharma - required-opps 149a4553772SBhupesh Sharma 150a4553772SBhupesh Sharmarequired: 151a4553772SBhupesh Sharma - compatible 152a4553772SBhupesh Sharma - reg 153a4553772SBhupesh Sharma - clocks 154a4553772SBhupesh Sharma - clock-names 155a4553772SBhupesh Sharma - interrupts 156a4553772SBhupesh Sharma 1578574adf5SBhupesh SharmaallOf: 1588574adf5SBhupesh Sharma - $ref: mmc-controller.yaml# 1598574adf5SBhupesh Sharma 160*54c16b52SKrzysztof Kozlowski - if: 161*54c16b52SKrzysztof Kozlowski properties: 162*54c16b52SKrzysztof Kozlowski compatible: 163*54c16b52SKrzysztof Kozlowski contains: 164*54c16b52SKrzysztof Kozlowski enum: 165*54c16b52SKrzysztof Kozlowski - qcom,sdhci-msm-v4 166*54c16b52SKrzysztof Kozlowski then: 167*54c16b52SKrzysztof Kozlowski properties: 168*54c16b52SKrzysztof Kozlowski reg: 169*54c16b52SKrzysztof Kozlowski minItems: 2 170*54c16b52SKrzysztof Kozlowski items: 171*54c16b52SKrzysztof Kozlowski - description: Host controller register map 172*54c16b52SKrzysztof Kozlowski - description: SD Core register map 173*54c16b52SKrzysztof Kozlowski - description: CQE register map 174*54c16b52SKrzysztof Kozlowski - description: Inline Crypto Engine register map 175*54c16b52SKrzysztof Kozlowski reg-names: 176*54c16b52SKrzysztof Kozlowski minItems: 2 177*54c16b52SKrzysztof Kozlowski items: 178*54c16b52SKrzysztof Kozlowski - const: hc 179*54c16b52SKrzysztof Kozlowski - const: core 180*54c16b52SKrzysztof Kozlowski - const: cqhci 181*54c16b52SKrzysztof Kozlowski - const: ice 182*54c16b52SKrzysztof Kozlowski else: 183*54c16b52SKrzysztof Kozlowski properties: 184*54c16b52SKrzysztof Kozlowski reg: 185*54c16b52SKrzysztof Kozlowski minItems: 1 186*54c16b52SKrzysztof Kozlowski items: 187*54c16b52SKrzysztof Kozlowski - description: Host controller register map 188*54c16b52SKrzysztof Kozlowski - description: CQE register map 189*54c16b52SKrzysztof Kozlowski - description: Inline Crypto Engine register map 190*54c16b52SKrzysztof Kozlowski reg-names: 191*54c16b52SKrzysztof Kozlowski minItems: 1 192*54c16b52SKrzysztof Kozlowski items: 193*54c16b52SKrzysztof Kozlowski - const: hc 194*54c16b52SKrzysztof Kozlowski - const: cqhci 195*54c16b52SKrzysztof Kozlowski - const: ice 196*54c16b52SKrzysztof Kozlowski 1978574adf5SBhupesh SharmaunevaluatedProperties: false 198a4553772SBhupesh Sharma 199a4553772SBhupesh Sharmaexamples: 200a4553772SBhupesh Sharma - | 201a4553772SBhupesh Sharma #include <dt-bindings/interrupt-controller/arm-gic.h> 202a4553772SBhupesh Sharma #include <dt-bindings/clock/qcom,gcc-sm8250.h> 203a4553772SBhupesh Sharma #include <dt-bindings/clock/qcom,rpmh.h> 204a4553772SBhupesh Sharma #include <dt-bindings/power/qcom-rpmpd.h> 205a4553772SBhupesh Sharma 2068574adf5SBhupesh Sharma sdhc_2: mmc@8804000 { 207a4553772SBhupesh Sharma compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 208a4553772SBhupesh Sharma reg = <0 0x08804000 0 0x1000>; 209a4553772SBhupesh Sharma 210a4553772SBhupesh Sharma interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 211a4553772SBhupesh Sharma <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 212a4553772SBhupesh Sharma interrupt-names = "hc_irq", "pwr_irq"; 213a4553772SBhupesh Sharma 214a4553772SBhupesh Sharma clocks = <&gcc GCC_SDCC2_AHB_CLK>, 215a4553772SBhupesh Sharma <&gcc GCC_SDCC2_APPS_CLK>, 216a4553772SBhupesh Sharma <&rpmhcc RPMH_CXO_CLK>; 217a4553772SBhupesh Sharma clock-names = "iface", "core", "xo"; 218a4553772SBhupesh Sharma iommus = <&apps_smmu 0x4a0 0x0>; 219a4553772SBhupesh Sharma qcom,dll-config = <0x0007642c>; 220a4553772SBhupesh Sharma qcom,ddr-config = <0x80040868>; 221a4553772SBhupesh Sharma power-domains = <&rpmhpd SM8250_CX>; 222a4553772SBhupesh Sharma 223a4553772SBhupesh Sharma operating-points-v2 = <&sdhc2_opp_table>; 224a4553772SBhupesh Sharma 225a4553772SBhupesh Sharma sdhc2_opp_table: opp-table { 226a4553772SBhupesh Sharma compatible = "operating-points-v2"; 227a4553772SBhupesh Sharma 228a4553772SBhupesh Sharma opp-19200000 { 229a4553772SBhupesh Sharma opp-hz = /bits/ 64 <19200000>; 230a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_min_svs>; 231a4553772SBhupesh Sharma }; 232a4553772SBhupesh Sharma 233a4553772SBhupesh Sharma opp-50000000 { 234a4553772SBhupesh Sharma opp-hz = /bits/ 64 <50000000>; 235a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_low_svs>; 236a4553772SBhupesh Sharma }; 237a4553772SBhupesh Sharma 238a4553772SBhupesh Sharma opp-100000000 { 239a4553772SBhupesh Sharma opp-hz = /bits/ 64 <100000000>; 240a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_svs>; 241a4553772SBhupesh Sharma }; 242a4553772SBhupesh Sharma 243a4553772SBhupesh Sharma opp-202000000 { 244a4553772SBhupesh Sharma opp-hz = /bits/ 64 <202000000>; 245a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_svs_l1>; 246a4553772SBhupesh Sharma }; 247a4553772SBhupesh Sharma }; 248a4553772SBhupesh Sharma }; 249