1a4553772SBhupesh Sharma# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2a4553772SBhupesh Sharma 3a4553772SBhupesh Sharma%YAML 1.2 4a4553772SBhupesh Sharma--- 5a4553772SBhupesh Sharma$id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#" 6a4553772SBhupesh Sharma$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7a4553772SBhupesh Sharma 8a4553772SBhupesh Sharmatitle: Qualcomm SDHCI controller (sdhci-msm) 9a4553772SBhupesh Sharma 10a4553772SBhupesh Sharmamaintainers: 11a4553772SBhupesh Sharma - Bhupesh Sharma <bhupesh.sharma@linaro.org> 12a4553772SBhupesh Sharma 13a4553772SBhupesh Sharmadescription: 14a4553772SBhupesh Sharma Secure Digital Host Controller Interface (SDHCI) present on 15a4553772SBhupesh Sharma Qualcomm SOCs supports SD/MMC/SDIO devices. 16a4553772SBhupesh Sharma 17a4553772SBhupesh Sharmaproperties: 18a4553772SBhupesh Sharma compatible: 19a4553772SBhupesh Sharma oneOf: 20a4553772SBhupesh Sharma - items: 21a4553772SBhupesh Sharma - enum: 22a4553772SBhupesh Sharma - qcom,apq8084-sdhci 23a4553772SBhupesh Sharma - qcom,msm8226-sdhci 24a4553772SBhupesh Sharma - qcom,msm8953-sdhci 25a4553772SBhupesh Sharma - qcom,msm8974-sdhci 26a4553772SBhupesh Sharma - qcom,msm8916-sdhci 27a4553772SBhupesh Sharma - qcom,msm8992-sdhci 28a4553772SBhupesh Sharma - qcom,msm8994-sdhci 29a4553772SBhupesh Sharma - qcom,msm8996-sdhci 30a4553772SBhupesh Sharma - qcom,qcs404-sdhci 31a4553772SBhupesh Sharma - qcom,sc7180-sdhci 32a4553772SBhupesh Sharma - qcom,sc7280-sdhci 33a4553772SBhupesh Sharma - qcom,sdm630-sdhci 34a4553772SBhupesh Sharma - qcom,sdm845-sdhci 35a4553772SBhupesh Sharma - qcom,sdx55-sdhci 36*210deba2SRohit Agarwal - qcom,sdx65-sdhci 37a4553772SBhupesh Sharma - qcom,sm6125-sdhci 38a4553772SBhupesh Sharma - qcom,sm6350-sdhci 3917a9f73dSBhupesh Sharma - qcom,sm8150-sdhci 40a4553772SBhupesh Sharma - qcom,sm8250-sdhci 41a4553772SBhupesh Sharma - enum: 42a4553772SBhupesh Sharma - qcom,sdhci-msm-v4 # for sdcc versions less than 5.0 43a4553772SBhupesh Sharma - qcom,sdhci-msm-v5 # for sdcc version 5.0 44a4553772SBhupesh Sharma - items: 45a4553772SBhupesh Sharma - const: qcom,sdhci-msm-v4 # Deprecated (only for backward compatibility) 46a4553772SBhupesh Sharma # for sdcc versions less than 5.0 47a4553772SBhupesh Sharma 48a4553772SBhupesh Sharma reg: 49a4553772SBhupesh Sharma minItems: 1 50a4553772SBhupesh Sharma items: 51a4553772SBhupesh Sharma - description: Host controller register map 52a4553772SBhupesh Sharma - description: SD Core register map 53a4553772SBhupesh Sharma - description: CQE register map 54a4553772SBhupesh Sharma - description: Inline Crypto Engine register map 55a4553772SBhupesh Sharma 56a4553772SBhupesh Sharma clocks: 57a4553772SBhupesh Sharma minItems: 3 58a4553772SBhupesh Sharma items: 59a4553772SBhupesh Sharma - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock 60a4553772SBhupesh Sharma - description: SDC MMC clock, MCLK 61a4553772SBhupesh Sharma - description: TCXO clock 62a4553772SBhupesh Sharma - description: clock for Inline Crypto Engine 63a4553772SBhupesh Sharma - description: SDCC bus voter clock 64a4553772SBhupesh Sharma - description: reference clock for RCLK delay calibration 65a4553772SBhupesh Sharma - description: sleep clock for RCLK delay calibration 66a4553772SBhupesh Sharma 67a4553772SBhupesh Sharma clock-names: 68a4553772SBhupesh Sharma minItems: 2 69a4553772SBhupesh Sharma items: 70a4553772SBhupesh Sharma - const: iface 71a4553772SBhupesh Sharma - const: core 72a4553772SBhupesh Sharma - const: xo 73a4553772SBhupesh Sharma - const: ice 74a4553772SBhupesh Sharma - const: bus 75a4553772SBhupesh Sharma - const: cal 76a4553772SBhupesh Sharma - const: sleep 77a4553772SBhupesh Sharma 78a4553772SBhupesh Sharma interrupts: 79a4553772SBhupesh Sharma maxItems: 2 80a4553772SBhupesh Sharma 81a4553772SBhupesh Sharma interrupt-names: 82a4553772SBhupesh Sharma items: 83a4553772SBhupesh Sharma - const: hc_irq 84a4553772SBhupesh Sharma - const: pwr_irq 85a4553772SBhupesh Sharma 86a4553772SBhupesh Sharma pinctrl-names: 87a4553772SBhupesh Sharma minItems: 1 88a4553772SBhupesh Sharma items: 89a4553772SBhupesh Sharma - const: default 90a4553772SBhupesh Sharma - const: sleep 91a4553772SBhupesh Sharma 92a4553772SBhupesh Sharma pinctrl-0: 93a4553772SBhupesh Sharma description: 94a4553772SBhupesh Sharma Should specify pin control groups used for this controller. 95a4553772SBhupesh Sharma 96a4553772SBhupesh Sharma qcom,ddr-config: 97a4553772SBhupesh Sharma $ref: /schemas/types.yaml#/definitions/uint32 98a4553772SBhupesh Sharma description: platform specific settings for DDR_CONFIG reg. 99a4553772SBhupesh Sharma 100a4553772SBhupesh Sharma qcom,dll-config: 101a4553772SBhupesh Sharma $ref: /schemas/types.yaml#/definitions/uint32 102a4553772SBhupesh Sharma description: platform specific settings for DLL_CONFIG reg. 103a4553772SBhupesh Sharma 104a4553772SBhupesh Sharma iommus: 105a4553772SBhupesh Sharma minItems: 1 106a4553772SBhupesh Sharma maxItems: 8 107a4553772SBhupesh Sharma description: | 108a4553772SBhupesh Sharma phandle to apps_smmu node with sid mask. 109a4553772SBhupesh Sharma 110a4553772SBhupesh Sharma interconnects: 111a4553772SBhupesh Sharma items: 112a4553772SBhupesh Sharma - description: data path, sdhc to ddr 113a4553772SBhupesh Sharma - description: config path, cpu to sdhc 114a4553772SBhupesh Sharma 115a4553772SBhupesh Sharma interconnect-names: 116a4553772SBhupesh Sharma items: 117a4553772SBhupesh Sharma - const: sdhc-ddr 118a4553772SBhupesh Sharma - const: cpu-sdhc 119a4553772SBhupesh Sharma 120a4553772SBhupesh Sharma power-domains: 121a4553772SBhupesh Sharma description: A phandle to sdhci power domain node 122a4553772SBhupesh Sharma maxItems: 1 123a4553772SBhupesh Sharma 124a4553772SBhupesh SharmapatternProperties: 125a4553772SBhupesh Sharma '^opp-table(-[a-z0-9]+)?$': 126a4553772SBhupesh Sharma if: 127a4553772SBhupesh Sharma properties: 128a4553772SBhupesh Sharma compatible: 129a4553772SBhupesh Sharma const: operating-points-v2 130a4553772SBhupesh Sharma then: 131a4553772SBhupesh Sharma patternProperties: 132a4553772SBhupesh Sharma '^opp-?[0-9]+$': 133a4553772SBhupesh Sharma required: 134a4553772SBhupesh Sharma - required-opps 135a4553772SBhupesh Sharma 136a4553772SBhupesh Sharmarequired: 137a4553772SBhupesh Sharma - compatible 138a4553772SBhupesh Sharma - reg 139a4553772SBhupesh Sharma - clocks 140a4553772SBhupesh Sharma - clock-names 141a4553772SBhupesh Sharma - interrupts 142a4553772SBhupesh Sharma 143a4553772SBhupesh SharmaadditionalProperties: true 144a4553772SBhupesh Sharma 145a4553772SBhupesh Sharmaexamples: 146a4553772SBhupesh Sharma - | 147a4553772SBhupesh Sharma #include <dt-bindings/interrupt-controller/arm-gic.h> 148a4553772SBhupesh Sharma #include <dt-bindings/clock/qcom,gcc-sm8250.h> 149a4553772SBhupesh Sharma #include <dt-bindings/clock/qcom,rpmh.h> 150a4553772SBhupesh Sharma #include <dt-bindings/power/qcom-rpmpd.h> 151a4553772SBhupesh Sharma 152a4553772SBhupesh Sharma sdhc_2: sdhci@8804000 { 153a4553772SBhupesh Sharma compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"; 154a4553772SBhupesh Sharma reg = <0 0x08804000 0 0x1000>; 155a4553772SBhupesh Sharma 156a4553772SBhupesh Sharma interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 157a4553772SBhupesh Sharma <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 158a4553772SBhupesh Sharma interrupt-names = "hc_irq", "pwr_irq"; 159a4553772SBhupesh Sharma 160a4553772SBhupesh Sharma clocks = <&gcc GCC_SDCC2_AHB_CLK>, 161a4553772SBhupesh Sharma <&gcc GCC_SDCC2_APPS_CLK>, 162a4553772SBhupesh Sharma <&rpmhcc RPMH_CXO_CLK>; 163a4553772SBhupesh Sharma clock-names = "iface", "core", "xo"; 164a4553772SBhupesh Sharma iommus = <&apps_smmu 0x4a0 0x0>; 165a4553772SBhupesh Sharma qcom,dll-config = <0x0007642c>; 166a4553772SBhupesh Sharma qcom,ddr-config = <0x80040868>; 167a4553772SBhupesh Sharma power-domains = <&rpmhpd SM8250_CX>; 168a4553772SBhupesh Sharma 169a4553772SBhupesh Sharma operating-points-v2 = <&sdhc2_opp_table>; 170a4553772SBhupesh Sharma 171a4553772SBhupesh Sharma sdhc2_opp_table: opp-table { 172a4553772SBhupesh Sharma compatible = "operating-points-v2"; 173a4553772SBhupesh Sharma 174a4553772SBhupesh Sharma opp-19200000 { 175a4553772SBhupesh Sharma opp-hz = /bits/ 64 <19200000>; 176a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_min_svs>; 177a4553772SBhupesh Sharma }; 178a4553772SBhupesh Sharma 179a4553772SBhupesh Sharma opp-50000000 { 180a4553772SBhupesh Sharma opp-hz = /bits/ 64 <50000000>; 181a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_low_svs>; 182a4553772SBhupesh Sharma }; 183a4553772SBhupesh Sharma 184a4553772SBhupesh Sharma opp-100000000 { 185a4553772SBhupesh Sharma opp-hz = /bits/ 64 <100000000>; 186a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_svs>; 187a4553772SBhupesh Sharma }; 188a4553772SBhupesh Sharma 189a4553772SBhupesh Sharma opp-202000000 { 190a4553772SBhupesh Sharma opp-hz = /bits/ 64 <202000000>; 191a4553772SBhupesh Sharma required-opps = <&rpmhpd_opp_svs_l1>; 192a4553772SBhupesh Sharma }; 193a4553772SBhupesh Sharma }; 194a4553772SBhupesh Sharma }; 195