1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip designware mobile storage host controller 8 9description: 10 Rockchip uses the Synopsys designware mobile storage host controller 11 to interface a SoC with storage medium such as eMMC or SD/MMC cards. 12 This file documents the combined properties for the core Synopsys dw mshc 13 controller that are not already included in the synopsys-dw-mshc-common.yaml 14 file and the Rockchip specific extensions. 15 16allOf: 17 - $ref: "synopsys-dw-mshc-common.yaml#" 18 19maintainers: 20 - Heiko Stuebner <heiko@sntech.de> 21 22# Everything else is described in the common file 23properties: 24 compatible: 25 oneOf: 26 # for Rockchip RK2928 and before RK3288 27 - const: rockchip,rk2928-dw-mshc 28 # for Rockchip RK3288 29 - const: rockchip,rk3288-dw-mshc 30 - items: 31 - enum: 32 - rockchip,px30-dw-mshc 33 - rockchip,rk1808-dw-mshc 34 - rockchip,rk3036-dw-mshc 35 - rockchip,rk3128-dw-mshc 36 - rockchip,rk3228-dw-mshc 37 - rockchip,rk3308-dw-mshc 38 - rockchip,rk3328-dw-mshc 39 - rockchip,rk3368-dw-mshc 40 - rockchip,rk3399-dw-mshc 41 - rockchip,rk3568-dw-mshc 42 - rockchip,rv1108-dw-mshc 43 - rockchip,rv1126-dw-mshc 44 - const: rockchip,rk3288-dw-mshc 45 46 reg: 47 maxItems: 1 48 49 interrupts: 50 maxItems: 1 51 52 clocks: 53 minItems: 2 54 maxItems: 4 55 description: 56 Handle to "biu" and "ciu" clocks for the bus interface unit clock and 57 the card interface unit clock. If "ciu-drive" and "ciu-sample" are 58 specified in clock-names, it should also contain 59 handles to these clocks. 60 61 clock-names: 62 minItems: 2 63 items: 64 - const: biu 65 - const: ciu 66 - const: ciu-drive 67 - const: ciu-sample 68 description: 69 Apart from the clock-names "biu" and "ciu" two more clocks 70 "ciu-drive" and "ciu-sample" are supported. They are used 71 to control the clock phases, "ciu-sample" is required for tuning 72 high speed modes. 73 74 rockchip,default-sample-phase: 75 $ref: /schemas/types.yaml#/definitions/uint32 76 minimum: 0 77 maximum: 360 78 default: 0 79 description: 80 The default phase to set "ciu-sample" at probing, 81 low speeds or in case where all phases work at tuning time. 82 If not specified 0 deg will be used. 83 84 rockchip,desired-num-phases: 85 $ref: /schemas/types.yaml#/definitions/uint32 86 minimum: 0 87 maximum: 360 88 default: 360 89 description: 90 The desired number of times that the host execute tuning when needed. 91 If not specified, the host will do tuning for 360 times, 92 namely tuning for each degree. 93 94required: 95 - compatible 96 - reg 97 - interrupts 98 - clocks 99 - clock-names 100 101unevaluatedProperties: false 102 103examples: 104 - | 105 #include <dt-bindings/clock/rk3288-cru.h> 106 #include <dt-bindings/interrupt-controller/arm-gic.h> 107 #include <dt-bindings/interrupt-controller/irq.h> 108 sdmmc: mmc@ff0c0000 { 109 compatible = "rockchip,rk3288-dw-mshc"; 110 reg = <0xff0c0000 0x4000>; 111 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 112 clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>, 113 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; 114 clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; 115 resets = <&cru SRST_MMC0>; 116 reset-names = "reset"; 117 fifo-depth = <0x100>; 118 max-frequency = <150000000>; 119 }; 120 121... 122