1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Renesas SDHI SD/MMC controller 8 9maintainers: 10 - Wolfram Sang <wsa+renesas@sang-engineering.com> 11 12allOf: 13 - $ref: "mmc-controller.yaml" 14 15properties: 16 compatible: 17 oneOf: 18 - items: 19 - const: renesas,sdhi-sh73a0 # R-Mobile APE6 20 - items: 21 - const: renesas,sdhi-r7s72100 # RZ/A1H 22 - items: 23 - const: renesas,sdhi-r7s9210 # SH-Mobile AG5 24 - items: 25 - const: renesas,sdhi-r8a73a4 # R-Mobile APE6 26 - items: 27 - const: renesas,sdhi-r8a7740 # R-Mobile A1 28 - items: 29 - enum: 30 - renesas,sdhi-r8a7778 # R-Car M1 31 - renesas,sdhi-r8a7779 # R-Car H1 32 - const: renesas,rcar-gen1-sdhi # R-Car Gen1 33 - items: 34 - enum: 35 - renesas,sdhi-r8a7742 # RZ/G1H 36 - renesas,sdhi-r8a7743 # RZ/G1M 37 - renesas,sdhi-r8a7744 # RZ/G1N 38 - renesas,sdhi-r8a7745 # RZ/G1E 39 - renesas,sdhi-r8a77470 # RZ/G1C 40 - renesas,sdhi-r8a7790 # R-Car H2 41 - renesas,sdhi-r8a7791 # R-Car M2-W 42 - renesas,sdhi-r8a7792 # R-Car V2H 43 - renesas,sdhi-r8a7793 # R-Car M2-N 44 - renesas,sdhi-r8a7794 # R-Car E2 45 - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1 46 - items: 47 - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP) 48 - items: 49 - enum: 50 - renesas,sdhi-r8a774a1 # RZ/G2M 51 - renesas,sdhi-r8a774b1 # RZ/G2N 52 - renesas,sdhi-r8a774c0 # RZ/G2E 53 - renesas,sdhi-r8a774e1 # RZ/G2H 54 - renesas,sdhi-r8a7795 # R-Car H3 55 - renesas,sdhi-r8a7796 # R-Car M3-W 56 - renesas,sdhi-r8a77961 # R-Car M3-W+ 57 - renesas,sdhi-r8a77965 # R-Car M3-N 58 - renesas,sdhi-r8a77970 # R-Car V3M 59 - renesas,sdhi-r8a77980 # R-Car V3H 60 - renesas,sdhi-r8a77990 # R-Car E3 61 - renesas,sdhi-r8a77995 # R-Car D3 62 - renesas,sdhi-r8a779a0 # R-Car V3U 63 - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2 64 65 reg: 66 maxItems: 1 67 68 interrupts: 69 minItems: 1 70 maxItems: 3 71 72 clocks: 73 minItems: 1 74 maxItems: 2 75 76 clock-names: 77 minItems: 1 78 maxItems: 2 79 items: 80 - const: core 81 - const: cd 82 83 dmas: 84 minItems: 4 85 maxItems: 4 86 87 dma-names: 88 minItems: 4 89 maxItems: 4 90 items: 91 enum: 92 - tx 93 - rx 94 95 power-domains: 96 maxItems: 1 97 98 resets: 99 maxItems: 1 100 101 pinctrl-0: 102 minItems: 1 103 maxItems: 2 104 105 pinctrl-1: 106 maxItems: 1 107 108 pinctrl-names: 109 minItems: 1 110 maxItems: 2 111 items: 112 - const: default 113 - const: state_uhs 114 115 max-frequency: true 116 117required: 118 - compatible 119 - reg 120 - interrupts 121 - clocks 122 - power-domains 123 124if: 125 properties: 126 compatible: 127 contains: 128 enum: 129 - renesas,sdhi-r7s72100 130 - renesas,sdhi-r7s9210 131then: 132 required: 133 - clock-names 134 description: 135 The internal card detection logic that exists in these controllers is 136 sectioned off to be run by a separate second clock source to allow 137 the main core clock to be turned off to save power. 138 139unevaluatedProperties: false 140 141examples: 142 - | 143 #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 144 #include <dt-bindings/interrupt-controller/arm-gic.h> 145 #include <dt-bindings/power/r8a7790-sysc.h> 146 147 sdhi0: mmc@ee100000 { 148 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 149 reg = <0xee100000 0x328>; 150 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 151 clocks = <&cpg CPG_MOD 314>; 152 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>; 153 dma-names = "tx", "rx", "tx", "rx"; 154 max-frequency = <195000000>; 155 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 156 resets = <&cpg 314>; 157 }; 158 159 sdhi1: mmc@ee120000 { 160 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 161 reg = <0xee120000 0x328>; 162 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 163 clocks = <&cpg CPG_MOD 313>; 164 dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>; 165 dma-names = "tx", "rx", "tx", "rx"; 166 max-frequency = <195000000>; 167 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 168 resets = <&cpg 313>; 169 }; 170 171 sdhi2: mmc@ee140000 { 172 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 173 reg = <0xee140000 0x100>; 174 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 175 clocks = <&cpg CPG_MOD 312>; 176 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>; 177 dma-names = "tx", "rx", "tx", "rx"; 178 max-frequency = <97500000>; 179 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 180 resets = <&cpg 312>; 181 }; 182 183 sdhi3: mmc@ee160000 { 184 compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi"; 185 reg = <0xee160000 0x100>; 186 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 187 clocks = <&cpg CPG_MOD 311>; 188 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>; 189 dma-names = "tx", "rx", "tx", "rx"; 190 max-frequency = <97500000>; 191 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 192 resets = <&cpg 311>; 193 }; 194