1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Renesas SDHI SD/MMC controller
8
9maintainers:
10  - Wolfram Sang <wsa+renesas@sang-engineering.com>
11
12allOf:
13  - $ref: "mmc-controller.yaml"
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - const: renesas,sdhi-sh73a0  # R-Mobile APE6
20      - items:
21          - const: renesas,sdhi-r7s72100 # RZ/A1H
22      - items:
23          - const: renesas,sdhi-r7s9210 # SH-Mobile AG5
24      - items:
25          - const: renesas,sdhi-r8a73a4 # R-Mobile APE6
26      - items:
27          - const: renesas,sdhi-r8a7740 # R-Mobile A1
28      - items:
29          - enum:
30              - renesas,sdhi-r8a7778 # R-Car M1
31              - renesas,sdhi-r8a7779 # R-Car H1
32          - const: renesas,rcar-gen1-sdhi # R-Car Gen1
33      - items:
34          - enum:
35              - renesas,sdhi-r8a7742  # RZ/G1H
36              - renesas,sdhi-r8a7743  # RZ/G1M
37              - renesas,sdhi-r8a7744  # RZ/G1N
38              - renesas,sdhi-r8a7745  # RZ/G1E
39              - renesas,sdhi-r8a77470 # RZ/G1C
40              - renesas,sdhi-r8a7790  # R-Car H2
41              - renesas,sdhi-r8a7791  # R-Car M2-W
42              - renesas,sdhi-r8a7792  # R-Car V2H
43              - renesas,sdhi-r8a7793  # R-Car M2-N
44              - renesas,sdhi-r8a7794  # R-Car E2
45          - const: renesas,rcar-gen2-sdhi # R-Car Gen2 and RZ/G1
46      - items:
47          - const: renesas,sdhi-mmc-r8a77470 # RZ/G1C (SDHI/MMC IP)
48      - items:
49          - enum:
50              - renesas,sdhi-r8a774a1 # RZ/G2M
51              - renesas,sdhi-r8a774b1 # RZ/G2N
52              - renesas,sdhi-r8a774c0 # RZ/G2E
53              - renesas,sdhi-r8a7795  # R-Car H3
54              - renesas,sdhi-r8a7796  # R-Car M3-W
55              - renesas,sdhi-r8a77961 # R-Car M3-W+
56              - renesas,sdhi-r8a77965 # R-Car M3-N
57              - renesas,sdhi-r8a77970 # R-Car V3M
58              - renesas,sdhi-r8a77980 # R-Car V3H
59              - renesas,sdhi-r8a77990 # R-Car E3
60              - renesas,sdhi-r8a77995 # R-Car D3
61          - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
62
63  reg:
64    maxItems: 1
65
66  interrupts:
67    minItems: 1
68    maxItems: 3
69
70  clocks:
71    minItems: 1
72    maxItems: 2
73
74  clock-names:
75    minItems: 1
76    maxItems: 2
77    items:
78      - const: core
79      - const: cd
80
81  dmas:
82    minItems: 4
83    maxItems: 4
84
85  dma-names:
86    minItems: 4
87    maxItems: 4
88    items:
89      enum:
90        - tx
91        - rx
92
93  power-domains:
94    maxItems: 1
95
96  resets:
97    maxItems: 1
98
99  pinctrl-0:
100    minItems: 1
101    maxItems: 2
102
103  pinctrl-1:
104    maxItems: 1
105
106  pinctrl-names:
107    minItems: 1
108    maxItems: 2
109    items:
110      - const: default
111      - const: state_uhs
112
113  max-frequency: true
114
115required:
116  - compatible
117  - reg
118  - interrupts
119  - clocks
120  - power-domains
121
122if:
123  properties:
124    compatible:
125      items:
126        enum:
127          - renesas,sdhi-r7s72100
128          - renesas,sdhi-r7s9210
129then:
130  required:
131    - clock-names
132  description:
133    The internal card detection logic that exists in these controllers is
134    sectioned off to be run by a separate second clock source to allow
135    the main core clock to be turned off to save power.
136
137unevaluatedProperties: false
138
139examples:
140  - |
141    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
142    #include <dt-bindings/interrupt-controller/arm-gic.h>
143    #include <dt-bindings/power/r8a7790-sysc.h>
144
145    sdhi0: mmc@ee100000 {
146            compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
147            reg = <0xee100000 0x328>;
148            interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
149            clocks = <&cpg CPG_MOD 314>;
150            dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&dmac1 0xcd>, <&dmac1 0xce>;
151            dma-names = "tx", "rx", "tx", "rx";
152            max-frequency = <195000000>;
153            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
154            resets = <&cpg 314>;
155    };
156
157    sdhi1: mmc@ee120000 {
158             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
159             reg = <0xee120000 0x328>;
160             interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
161             clocks = <&cpg CPG_MOD 313>;
162             dmas = <&dmac0 0xc9>, <&dmac0 0xca>, <&dmac1 0xc9>, <&dmac1 0xca>;
163             dma-names = "tx", "rx", "tx", "rx";
164             max-frequency = <195000000>;
165             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
166             resets = <&cpg 313>;
167    };
168
169    sdhi2: mmc@ee140000 {
170             compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
171             reg = <0xee140000 0x100>;
172             interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
173             clocks = <&cpg CPG_MOD 312>;
174             dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, <&dmac1 0xc1>, <&dmac1 0xc2>;
175             dma-names = "tx", "rx", "tx", "rx";
176             max-frequency = <97500000>;
177             power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
178             resets = <&cpg 312>;
179     };
180
181     sdhi3: mmc@ee160000 {
182              compatible = "renesas,sdhi-r8a7790", "renesas,rcar-gen2-sdhi";
183              reg = <0xee160000 0x100>;
184              interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
185              clocks = <&cpg CPG_MOD 311>;
186              dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, <&dmac1 0xd3>, <&dmac1 0xd4>;
187              dma-names = "tx", "rx", "tx", "rx";
188              max-frequency = <97500000>;
189              power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
190              resets = <&cpg 311>;
191    };
192