1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Enhanced Secure Digital Host Controller (eSDHC) for i.MX
8
9maintainers:
10  - Shawn Guo <shawnguo@kernel.org>
11
12allOf:
13  - $ref: "mmc-controller.yaml"
14
15description: |
16  The Enhanced Secure Digital Host Controller on Freescale i.MX family
17  provides an interface for MMC, SD, and SDIO types of memory cards.
18
19  This file documents differences between the core properties described
20  by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
21
22properties:
23  compatible:
24    oneOf:
25      - enum:
26          - fsl,imx25-esdhc
27          - fsl,imx35-esdhc
28          - fsl,imx51-esdhc
29          - fsl,imx53-esdhc
30          - fsl,imx6q-usdhc
31          - fsl,imx6sl-usdhc
32          - fsl,imx6sx-usdhc
33          - fsl,imx6ull-usdhc
34          - fsl,imx7d-usdhc
35          - fsl,imx7ulp-usdhc
36      - items:
37          - enum:
38              - fsl,imx8mm-usdhc
39              - fsl,imx8mn-usdhc
40              - fsl,imx8mp-usdhc
41              - fsl,imx8mq-usdhc
42              - fsl,imx8qxp-usdhc
43          - const: fsl,imx7d-usdhc
44
45  reg:
46    maxItems: 1
47
48  interrupts:
49    maxItems: 1
50
51  fsl,wp-controller:
52    description: |
53      boolean, if present, indicate to use controller internal write protection.
54    type: boolean
55
56  fsl,delay-line:
57    $ref: /schemas/types.yaml#/definitions/uint32
58    description: |
59      Specify the number of delay cells for override mode.
60      This is used to set the clock delay for DLL(Delay Line) on override mode
61      to select a proper data sampling window in case the clock quality is not good
62      due to signal path is too long on the board. Please refer to eSDHC/uSDHC
63      chapter, DLL (Delay Line) section in RM for details.
64    default: 0
65
66  voltage-ranges:
67    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'
68    description: |
69      Specify the voltage range in case there are software transparent level
70      shifters on the outputs of the controller. Two cells are required, first
71      cell specifies minimum slot voltage (mV), second cell specifies maximum
72      slot voltage (mV).
73    items:
74      items:
75        - description: value for minimum slot voltage
76        - description: value for maximum slot voltage
77    maxItems: 1
78
79  fsl,tuning-start-tap:
80    $ref: /schemas/types.yaml#/definitions/uint32
81    description: |
82      Specify the start delay cell point when send first CMD19 in tuning procedure.
83    default: 0
84
85  fsl,tuning-step:
86    $ref: /schemas/types.yaml#/definitions/uint32
87    description: |
88      Specify the increasing delay cell steps in tuning procedure.
89      The uSDHC use one delay cell as default increasing step to do tuning process.
90      This property allows user to change the tuning step to more than one delay
91      cells which is useful for some special boards or cards when the default
92      tuning step can't find the proper delay window within limited tuning retries.
93    default: 0
94
95  fsl,strobe-dll-delay-target:
96    $ref: /schemas/types.yaml#/definitions/uint32
97    description: |
98      Specify the strobe dll control slave delay target.
99      This delay target programming host controller loopback read clock, and this
100      property allows user to change the delay target for the strobe input read clock.
101      If not use this property, driver default set the delay target to value 7.
102      Only eMMC HS400 mode need to take care of this property.
103    default: 0
104
105required:
106  - compatible
107  - reg
108  - interrupts
109
110unevaluatedProperties: false
111
112examples:
113  - |
114    mmc@70004000 {
115        compatible = "fsl,imx51-esdhc";
116        reg = <0x70004000 0x4000>;
117        interrupts = <1>;
118        fsl,wp-controller;
119    };
120
121    mmc@70008000 {
122        compatible = "fsl,imx51-esdhc";
123        reg = <0x70008000 0x4000>;
124        interrupts = <2>;
125        cd-gpios = <&gpio1 6 0>; /* GPIO1_6 */
126        wp-gpios = <&gpio1 5 0>; /* GPIO1_5 */
127    };
128