1* Freescale Enhanced Secure Digital Host Controller (eSDHC)
2
3The Enhanced Secure Digital Host Controller provides an interface
4for MMC, SD, and SDIO types of memory cards.
5
6This file documents differences between the core properties described
7by mmc.txt and the properties used by the sdhci-esdhc driver.
8
9Required properties:
10  - interrupt-parent : interrupt source phandle.
11  - clock-frequency : specifies eSDHC base clock frequency.
12
13Optional properties:
14  - sdhci,wp-inverted : specifies that eSDHC controller reports
15    inverted write-protect state; New devices should use the generic
16    "wp-inverted" property.
17  - sdhci,1-bit-only : specifies that a controller can only handle
18    1-bit data transfers. New devices should use the generic
19    "bus-width = <1>" property.
20  - sdhci,auto-cmd12: specifies that a controller can only handle auto
21    CMD12.
22  - voltage-ranges : two cells are required, first cell specifies minimum
23    slot voltage (mV), second cell specifies maximum slot voltage (mV).
24    Several ranges could be specified.
25  - little-endian : If the host controller is little-endian mode, specify
26    this property. The default endian mode is big-endian.
27
28Example:
29
30sdhci@2e000 {
31	compatible = "fsl,mpc8378-esdhc", "fsl,esdhc";
32	reg = <0x2e000 0x1000>;
33	interrupts = <42 0x8>;
34	interrupt-parent = <&ipic>;
35	/* Filled in by U-Boot */
36	clock-frequency = <0>;
37	voltage-ranges = <3300 3300>;
38};
39