1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 Timers bindings
8
9description: |
10  This hardware block provides 3 types of timer along with PWM functionality:
11    - advanced-control timers consist of a 16-bit auto-reload counter driven
12      by a programmable prescaler, break input feature, PWM outputs and
13      complementary PWM outputs channels.
14    - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15      driven by a programmable prescaler and PWM outputs.
16    - basic timers consist of a 16-bit auto-reload counter driven by a
17      programmable prescaler.
18
19maintainers:
20  - Benjamin Gaignard <benjamin.gaignard@st.com>
21  - Fabrice Gasnier <fabrice.gasnier@st.com>
22
23properties:
24  compatible:
25    const: st,stm32-timers
26
27  reg:
28    maxItems: 1
29
30  clocks:
31    maxItems: 1
32
33  clock-names:
34    items:
35      - const: int
36
37  reset:
38    maxItems: 1
39
40  dmas:
41    minItems: 1
42    maxItems: 7
43
44  dma-names:
45    items:
46      enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
47    minItems: 1
48    maxItems: 7
49
50  "#address-cells":
51    const: 1
52
53  "#size-cells":
54    const: 0
55
56  pwm:
57    type: object
58
59    properties:
60      compatible:
61        const: st,stm32-pwm
62
63      "#pwm-cells":
64        const: 3
65
66      st,breakinput:
67        description:
68          One or two <index level filter> to describe break input
69          configurations.
70        allOf:
71          - $ref: /schemas/types.yaml#/definitions/uint32-matrix
72          - items:
73              items:
74                - description: |
75                    "index" indicates on which break input (0 or 1) the
76                    configuration should be applied.
77                  enum: [ 0 , 1]
78                - description: |
79                    "level" gives the active level (0=low or 1=high) of the
80                    input signal for this configuration
81                  enum: [ 0, 1 ]
82                - description: |
83                    "filter" gives the filtering value (up to 15) to be applied.
84                  maximum: 15
85            minItems: 1
86            maxItems: 2
87
88    required:
89      - "#pwm-cells"
90      - compatible
91
92patternProperties:
93  "^timer@[0-9]+$":
94    type: object
95
96    properties:
97      compatible:
98        enum:
99          - st,stm32-timer-trigger
100          - st,stm32h7-timer-trigger
101
102      reg:
103        description: Identify trigger hardware block.
104        items:
105         minimum: 0
106         maximum: 16
107
108    required:
109      - compatible
110      - reg
111
112  counter:
113    type: object
114
115    properties:
116      compatible:
117        const: st,stm32-timer-counter
118
119    required:
120      - compatible
121
122required:
123  - "#address-cells"
124  - "#size-cells"
125  - compatible
126  - reg
127  - clocks
128  - clock-names
129
130additionalProperties: false
131
132examples:
133  - |
134    #include <dt-bindings/clock/stm32mp1-clks.h>
135    timers2: timers@40000000 {
136      #address-cells = <1>;
137      #size-cells = <0>;
138      compatible = "st,stm32-timers";
139      reg = <0x40000000 0x400>;
140      clocks = <&rcc TIM2_K>;
141      clock-names = "int";
142      dmas = <&dmamux1 18 0x400 0x1>,
143             <&dmamux1 19 0x400 0x1>,
144             <&dmamux1 20 0x400 0x1>,
145             <&dmamux1 21 0x400 0x1>,
146             <&dmamux1 22 0x400 0x1>;
147      dma-names = "ch1", "ch2", "ch3", "ch4", "up";
148      pwm {
149        compatible = "st,stm32-pwm";
150        #pwm-cells = <3>;
151        st,breakinput = <0 1 5>;
152      };
153      timer@0 {
154        compatible = "st,stm32-timer-trigger";
155        reg = <0>;
156      };
157      counter {
158        compatible = "st,stm32-timer-counter";
159      };
160    };
161
162...
163