1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: STMicroelectronics STM32 Low-Power Timers bindings 8 9description: | 10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several 11 functions 12 - PWM output (with programmable prescaler, configurable polarity) 13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT) 14 - Several counter modes: 15 - quadrature encoder to detect angular position and direction of rotary 16 elements, from IN1 and IN2 input signals. 17 - simple counter from IN1 input signal. 18 19maintainers: 20 - Fabrice Gasnier <fabrice.gasnier@st.com> 21 22properties: 23 compatible: 24 const: st,stm32-lptimer 25 26 reg: 27 maxItems: 1 28 29 clocks: 30 maxItems: 1 31 32 clock-names: 33 items: 34 - const: mux 35 36 interrupts: 37 maxItems: 1 38 39 "#address-cells": 40 const: 1 41 42 "#size-cells": 43 const: 0 44 45 wakeup-source: true 46 47 pwm: 48 type: object 49 50 properties: 51 compatible: 52 const: st,stm32-pwm-lp 53 54 "#pwm-cells": 55 const: 3 56 57 required: 58 - "#pwm-cells" 59 - compatible 60 61patternProperties: 62 "^trigger@[0-9]+$": 63 type: object 64 65 properties: 66 compatible: 67 const: st,stm32-lptimer-trigger 68 69 reg: 70 description: Identify trigger hardware block. 71 items: 72 minimum: 0 73 maximum: 2 74 75 required: 76 - compatible 77 - reg 78 79 counter: 80 type: object 81 82 properties: 83 compatible: 84 const: st,stm32-lptimer-counter 85 86 required: 87 - compatible 88 89 timer: 90 type: object 91 92 properties: 93 compatible: 94 const: st,stm32-lptimer-timer 95 96 required: 97 - compatible 98 99required: 100 - "#address-cells" 101 - "#size-cells" 102 - compatible 103 - reg 104 - clocks 105 - clock-names 106 107additionalProperties: false 108 109examples: 110 - | 111 #include <dt-bindings/clock/stm32mp1-clks.h> 112 #include <dt-bindings/interrupt-controller/arm-gic.h> 113 timer@40002400 { 114 compatible = "st,stm32-lptimer"; 115 reg = <0x40002400 0x400>; 116 clocks = <&timer_clk>; 117 clock-names = "mux"; 118 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>; 119 #address-cells = <1>; 120 #size-cells = <0>; 121 122 pwm { 123 compatible = "st,stm32-pwm-lp"; 124 #pwm-cells = <3>; 125 }; 126 127 trigger@0 { 128 compatible = "st,stm32-lptimer-trigger"; 129 reg = <0>; 130 }; 131 132 counter { 133 compatible = "st,stm32-lptimer-counter"; 134 }; 135 136 timer { 137 compatible = "st,stm32-lptimer-timer"; 138 }; 139 }; 140 141... 142