1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Canaan Kendryte K210 System Controller
8
9maintainers:
10  - Damien Le Moal <damien.lemoal@wdc.com>
11
12description:
13  Canaan Inc. Kendryte K210 SoC system controller which provides a
14  register map for controlling the clocks, reset signals and pin power
15  domains of the SoC.
16
17properties:
18  compatible:
19    items:
20      - const: canaan,k210-sysctl
21      - const: syscon
22      - const: simple-mfd
23
24  clocks:
25    maxItems: 1
26    description:
27      System controller Advanced Power Bus (APB) interface clock source.
28
29  clock-names:
30    items:
31      - const: pclk
32
33  reg:
34    maxItems: 1
35
36  clock-controller:
37    # Child node
38    type: object
39    $ref: ../clock/canaan,k210-clk.yaml
40    description:
41      Clock controller for the SoC clocks. This child node definition
42      should follow the bindings specified in
43      Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml.
44
45  reset-controller:
46    # Child node
47    type: object
48    $ref: ../reset/canaan,k210-rst.yaml
49    description:
50      Reset controller for the SoC. This child node definition
51      should follow the bindings specified in
52      Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml.
53
54  syscon-reboot:
55    # Child node
56    type: object
57    $ref: ../power/reset/syscon-reboot.yaml
58    description:
59      Reboot method for the SoC. This child node definition
60      should follow the bindings specified in
61      Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml.
62
63required:
64  - compatible
65  - clocks
66  - reg
67  - clock-controller
68
69additionalProperties: false
70
71examples:
72  - |
73    #include <dt-bindings/clock/k210-clk.h>
74    #include <dt-bindings/reset/k210-rst.h>
75
76    clocks {
77      in0: oscllator {
78        compatible = "fixed-clock";
79        #clock-cells = <0>;
80        clock-frequency = <26000000>;
81      };
82    };
83
84    sysctl: syscon@50440000 {
85      compatible = "canaan,k210-sysctl",
86                   "syscon", "simple-mfd";
87      reg = <0x50440000 0x100>;
88      clocks = <&sysclk K210_CLK_APB1>;
89      clock-names = "pclk";
90
91      sysclk: clock-controller {
92        #clock-cells = <1>;
93        compatible = "canaan,k210-clk";
94        clocks = <&in0>;
95      };
96
97      sysrst: reset-controller {
98        compatible = "canaan,k210-rst";
99        #reset-cells = <1>;
100      };
101
102      reboot: syscon-reboot {
103        compatible = "syscon-reboot";
104        regmap = <&sysctl>;
105        offset = <48>;
106        mask = <1>;
107        value = <1>;
108      };
109    };
110