1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mfd/brcm,cru.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Broadcom CRU 8 9maintainers: 10 - Rafał Miłecki <rafal@milecki.pl> 11 12description: | 13 Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware 14 block grouping smaller blocks. On Broadcom Northstar platform it contains e.g. 15 clocks, pinctrl, USB PHY and thermal. 16 17properties: 18 compatible: 19 items: 20 - enum: 21 - brcm,ns-cru 22 - const: simple-mfd 23 24 reg: 25 description: CRU registers 26 27 ranges: true 28 29 "#address-cells": 30 const: 1 31 32 "#size-cells": 33 const: 1 34 35 pinctrl: 36 $ref: ../pinctrl/brcm,ns-pinmux.yaml 37 38patternProperties: 39 '^clock-controller@[a-f0-9]+$': 40 $ref: ../clock/brcm,iproc-clocks.yaml 41 42 '^syscon@[a-f0-9]+$': 43 $ref: syscon.yaml 44 45 '^thermal@[a-f0-9]+$': 46 $ref: ../thermal/brcm,ns-thermal.yaml 47 48additionalProperties: false 49 50required: 51 - reg 52 53examples: 54 - | 55 cru-bus@1800c100 { 56 compatible = "brcm,ns-cru", "simple-mfd"; 57 reg = <0x1800c100 0x1d0>; 58 ranges; 59 #address-cells = <1>; 60 #size-cells = <1>; 61 62 clock-controller@100 { 63 #clock-cells = <1>; 64 compatible = "brcm,nsp-lcpll0"; 65 reg = <0x100 0x14>; 66 clocks = <&osc>; 67 clock-output-names = "lcpll0", "pcie_phy", "sdio", "ddr_phy"; 68 }; 69 70 clock-controller@140 { 71 #clock-cells = <1>; 72 compatible = "brcm,nsp-genpll"; 73 reg = <0x140 0x24>; 74 clocks = <&osc>; 75 clock-output-names = "genpll", "phy", "ethernetclk", "usbclk", 76 "iprocfast", "sata1", "sata2"; 77 }; 78 79 syscon@180 { 80 compatible = "brcm,cru-clkset", "syscon"; 81 reg = <0x180 0x4>; 82 }; 83 84 pinctrl { 85 compatible = "brcm,bcm4708-pinmux"; 86 offset = <0x1c0>; 87 }; 88 89 thermal@2c0 { 90 compatible = "brcm,ns-thermal"; 91 reg = <0x2c0 0x10>; 92 #thermal-sensor-cells = <0>; 93 }; 94 }; 95