1Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
2
3Required properties:
4 - compatible: value should be one of the following:
5   "atmel,at91sam9n12-hlcdc"
6   "atmel,at91sam9x5-hlcdc"
7   "atmel,sama5d2-hlcdc"
8   "atmel,sama5d3-hlcdc"
9   "atmel,sama5d4-hlcdc"
10 - reg: base address and size of the HLCDC device registers.
11 - clock-names: the name of the 3 clocks requested by the HLCDC device.
12   Should contain "periph_clk", "sys_clk" and "slow_clk".
13 - clocks: should contain the 3 clocks requested by the HLCDC device.
14 - interrupts: should contain the description of the HLCDC interrupt line
15
16The HLCDC IP exposes two subdevices:
17 - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt
18 - a Display Controller: see ../display/atmel/hlcdc-dc.txt
19
20Example:
21
22	hlcdc: hlcdc@f0030000 {
23		compatible = "atmel,sama5d3-hlcdc";
24		reg = <0xf0030000 0x2000>;
25		clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
26		clock-names = "periph_clk","sys_clk", "slow_clk";
27		interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
28
29		hlcdc-display-controller {
30			compatible = "atmel,hlcdc-display-controller";
31			pinctrl-names = "default";
32			pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
33			#address-cells = <1>;
34			#size-cells = <0>;
35
36			port@0 {
37				#address-cells = <1>;
38				#size-cells = <0>;
39				reg = <0>;
40
41				hlcdc_panel_output: endpoint@0 {
42					reg = <0>;
43					remote-endpoint = <&panel_input>;
44				};
45			};
46		};
47
48		hlcdc_pwm: hlcdc-pwm {
49			compatible = "atmel,hlcdc-pwm";
50			pinctrl-names = "default";
51			pinctrl-0 = <&pinctrl_lcd_pwm>;
52			#pwm-cells = <3>;
53		};
54	};
55