1590b7795SBoris BrezillonDevice-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
2590b7795SBoris Brezillon
3590b7795SBoris BrezillonRequired properties:
4590b7795SBoris Brezillon - compatible: value should be one of the following:
5590b7795SBoris Brezillon   "atmel,sama5d3-hlcdc"
6590b7795SBoris Brezillon - reg: base address and size of the HLCDC device registers.
7590b7795SBoris Brezillon - clock-names: the name of the 3 clocks requested by the HLCDC device.
8590b7795SBoris Brezillon   Should contain "periph_clk", "sys_clk" and "slow_clk".
9590b7795SBoris Brezillon - clocks: should contain the 3 clocks requested by the HLCDC device.
10590b7795SBoris Brezillon - interrupts: should contain the description of the HLCDC interrupt line
11590b7795SBoris Brezillon
12590b7795SBoris BrezillonThe HLCDC IP exposes two subdevices:
13590b7795SBoris Brezillon - a PWM chip: see ../pwm/atmel-hlcdc-pwm.txt
14590b7795SBoris Brezillon - a Display Controller: see ../drm/atmel-hlcdc-dc.txt
15590b7795SBoris Brezillon
16590b7795SBoris BrezillonExample:
17590b7795SBoris Brezillon
18590b7795SBoris Brezillon	hlcdc: hlcdc@f0030000 {
19590b7795SBoris Brezillon		compatible = "atmel,sama5d3-hlcdc";
20590b7795SBoris Brezillon		reg = <0xf0030000 0x2000>;
21590b7795SBoris Brezillon		clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
22590b7795SBoris Brezillon		clock-names = "periph_clk","sys_clk", "slow_clk";
23590b7795SBoris Brezillon		interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
24590b7795SBoris Brezillon		status = "disabled";
25590b7795SBoris Brezillon
26590b7795SBoris Brezillon		hlcdc-display-controller {
27590b7795SBoris Brezillon			compatible = "atmel,hlcdc-display-controller";
28590b7795SBoris Brezillon			pinctrl-names = "default";
29590b7795SBoris Brezillon			pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
30590b7795SBoris Brezillon			#address-cells = <1>;
31590b7795SBoris Brezillon			#size-cells = <0>;
32590b7795SBoris Brezillon
33590b7795SBoris Brezillon			port@0 {
34590b7795SBoris Brezillon				#address-cells = <1>;
35590b7795SBoris Brezillon				#size-cells = <0>;
36590b7795SBoris Brezillon				reg = <0>;
37590b7795SBoris Brezillon
38590b7795SBoris Brezillon				hlcdc_panel_output: endpoint@0 {
39590b7795SBoris Brezillon					reg = <0>;
40590b7795SBoris Brezillon					remote-endpoint = <&panel_input>;
41590b7795SBoris Brezillon				};
42590b7795SBoris Brezillon			};
43590b7795SBoris Brezillon		};
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45590b7795SBoris Brezillon		hlcdc_pwm: hlcdc-pwm {
46590b7795SBoris Brezillon			compatible = "atmel,hlcdc-pwm";
47590b7795SBoris Brezillon			pinctrl-names = "default";
48590b7795SBoris Brezillon			pinctrl-0 = <&pinctrl_lcd_pwm>;
49590b7795SBoris Brezillon			#pwm-cells = <3>;
50590b7795SBoris Brezillon		};
51590b7795SBoris Brezillon	};
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