1*c67ea7d2SShubhrajyoti Datta# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*c67ea7d2SShubhrajyoti Datta%YAML 1.2
3*c67ea7d2SShubhrajyoti Datta---
4*c67ea7d2SShubhrajyoti Datta$id: http://devicetree.org/schemas/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml#
5*c67ea7d2SShubhrajyoti Datta$schema: http://devicetree.org/meta-schemas/core.yaml#
6*c67ea7d2SShubhrajyoti Datta
7*c67ea7d2SShubhrajyoti Dattatitle: Xilinx Zynqmp OCM(On-Chip Memory) Controller
8*c67ea7d2SShubhrajyoti Datta
9*c67ea7d2SShubhrajyoti Dattamaintainers:
10*c67ea7d2SShubhrajyoti Datta  - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
11*c67ea7d2SShubhrajyoti Datta  - Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
12*c67ea7d2SShubhrajyoti Datta
13*c67ea7d2SShubhrajyoti Dattadescription: |
14*c67ea7d2SShubhrajyoti Datta  The OCM supports 64-bit wide ECC functionality to detect multi-bit errors
15*c67ea7d2SShubhrajyoti Datta  and recover from a single-bit memory fault.On a write, if all bytes are
16*c67ea7d2SShubhrajyoti Datta  being written, the ECC is generated and written into the ECC RAM along with
17*c67ea7d2SShubhrajyoti Datta  the write-data that is written into the data RAM. If one or more bytes are
18*c67ea7d2SShubhrajyoti Datta  not written, then the read operation results in an correctable error or
19*c67ea7d2SShubhrajyoti Datta  uncorrectable error.
20*c67ea7d2SShubhrajyoti Datta
21*c67ea7d2SShubhrajyoti Dattaproperties:
22*c67ea7d2SShubhrajyoti Datta  compatible:
23*c67ea7d2SShubhrajyoti Datta    const: xlnx,zynqmp-ocmc-1.0
24*c67ea7d2SShubhrajyoti Datta
25*c67ea7d2SShubhrajyoti Datta  reg:
26*c67ea7d2SShubhrajyoti Datta    maxItems: 1
27*c67ea7d2SShubhrajyoti Datta
28*c67ea7d2SShubhrajyoti Datta  interrupts:
29*c67ea7d2SShubhrajyoti Datta    maxItems: 1
30*c67ea7d2SShubhrajyoti Datta
31*c67ea7d2SShubhrajyoti Dattarequired:
32*c67ea7d2SShubhrajyoti Datta  - compatible
33*c67ea7d2SShubhrajyoti Datta  - reg
34*c67ea7d2SShubhrajyoti Datta  - interrupts
35*c67ea7d2SShubhrajyoti Datta
36*c67ea7d2SShubhrajyoti DattaadditionalProperties: false
37*c67ea7d2SShubhrajyoti Datta
38*c67ea7d2SShubhrajyoti Dattaexamples:
39*c67ea7d2SShubhrajyoti Datta  - |
40*c67ea7d2SShubhrajyoti Datta    #include <dt-bindings/interrupt-controller/arm-gic.h>
41*c67ea7d2SShubhrajyoti Datta    memory-controller@ff960000 {
42*c67ea7d2SShubhrajyoti Datta      compatible = "xlnx,zynqmp-ocmc-1.0";
43*c67ea7d2SShubhrajyoti Datta      reg = <0xff960000 0x1000>;
44*c67ea7d2SShubhrajyoti Datta      interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
45*c67ea7d2SShubhrajyoti Datta    };
46