1* EMIF family of TI SDRAM controllers
2
3EMIF - External Memory Interface - is an SDRAM controller used in
4TI SoCs. EMIF supports, based on the IP revision, one or more of
5DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
6of the EMIF IP and memory parts attached to it.
7
8Required properties:
9- compatible	: Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
10  is the IP revision of the specific EMIF instance. For newer controllers,
11  compatible should be one of the following:
12  	     "ti,emif-am3352"
13	     "ti,emif-am4372"
14
15- phy-type	: <u32> indicating the DDR phy type. Following are the
16  allowed values
17  <1>	: Attila PHY
18  <2>	: Intelli PHY
19
20- device-handle	: phandle to a "lpddr2" node representing the memory part
21
22- ti,hwmods	: For TI hwmods processing and omap device creation
23  the value shall be "emif<n>" where <n> is the number of the EMIF
24  instance with base 1.
25
26Optional properties:
27- cs1-used		: Have this property if CS1 of this EMIF
28  instance has a memory part attached to it. If there is a memory
29  part attached to CS1, it should be the same type as the one on CS0,
30  so there is no need to give the details of this memory part.
31
32- cal-resistor-per-cs	: Have this property if the board has one
33  calibration resistor per chip-select.
34
35- hw-caps-read-idle-ctrl: Have this property if the controller
36  supports read idle window programming
37
38- hw-caps-dll-calib-ctrl: Have this property if the controller
39  supports dll calibration control
40
41- hw-caps-ll-interface	: Have this property if the controller
42  has a low latency interface and corresponding interrupt events
43
44- hw-caps-temp-alert	: Have this property if the controller
45  has capability for generating SDRAM temperature alerts
46
47Example:
48
49emif1: emif@4c000000 {
50	compatible	= "ti,emif-4d";
51	ti,hwmods	= "emif2";
52	phy-type	= <1>;
53	device-handle	= <&elpida_ECB240ABACN>;
54	cs1-used;
55	hw-caps-read-idle-ctrl;
56	hw-caps-ll-interface;
57	hw-caps-temp-alert;
58};
59