1* EMIF family of TI SDRAM controllers 2 3EMIF - External Memory Interface - is an SDRAM controller used in 4TI SoCs. EMIF supports, based on the IP revision, one or more of 5DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance 6of the EMIF IP and memory parts attached to it. 7 8Required properties: 9- compatible : Should be of the form "ti,emif-<ip-rev>" where <ip-rev> 10 is the IP revision of the specific EMIF instance. For newer controllers, 11 compatible should be one of the following: 12 "ti,emif-am3352" 13 "ti,emif-am4372" 14 15- phy-type : <u32> indicating the DDR phy type. Following are the 16 allowed values 17 <1> : Attila PHY 18 <2> : Intelli PHY 19 20- device-handle : phandle to a "lpddr2" node representing the memory part 21 22- ti,hwmods : For TI hwmods processing and omap device creation 23 the value shall be "emif<n>" where <n> is the number of the EMIF 24 instance with base 1. 25 26Required only for "ti,emif-am3352" and "ti,emif-am4372": 27- sram : Phandles for generic sram driver nodes, 28 first should be type 'protect-exec' for the driver to use to copy 29 and run PM functions, second should be regular pool to be used for 30 data region for code. See Documentation/devicetree/bindings/sram/sram.txt 31 for more details. 32 33Optional properties: 34- cs1-used : Have this property if CS1 of this EMIF 35 instance has a memory part attached to it. If there is a memory 36 part attached to CS1, it should be the same type as the one on CS0, 37 so there is no need to give the details of this memory part. 38 39- cal-resistor-per-cs : Have this property if the board has one 40 calibration resistor per chip-select. 41 42- hw-caps-read-idle-ctrl: Have this property if the controller 43 supports read idle window programming 44 45- hw-caps-dll-calib-ctrl: Have this property if the controller 46 supports dll calibration control 47 48- hw-caps-ll-interface : Have this property if the controller 49 has a low latency interface and corresponding interrupt events 50 51- hw-caps-temp-alert : Have this property if the controller 52 has capability for generating SDRAM temperature alerts 53 54-Examples: 55 56emif1: emif@4c000000 { 57 compatible = "ti,emif-4d"; 58 ti,hwmods = "emif2"; 59 phy-type = <1>; 60 device-handle = <&elpida_ECB240ABACN>; 61 cs1-used; 62 hw-caps-read-idle-ctrl; 63 hw-caps-ll-interface; 64 hw-caps-temp-alert; 65}; 66 67/* From am33xx.dtsi */ 68emif: emif@4c000000 { 69 compatible = "ti,emif-am3352"; 70 reg = <0x4C000000 0x1000>; 71 sram = <&pm_sram_code 72 &pm_sram_data>; 73}; 74