1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: SMI (Smart Multimedia Interface) Local Arbiter
9
10maintainers:
11  - Yong Wu <yong.wu@mediatek.com>
12
13description: |
14  The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - mediatek,mt2701-smi-larb
21          - mediatek,mt2712-smi-larb
22          - mediatek,mt6779-smi-larb
23          - mediatek,mt6795-smi-larb
24          - mediatek,mt8167-smi-larb
25          - mediatek,mt8173-smi-larb
26          - mediatek,mt8183-smi-larb
27          - mediatek,mt8186-smi-larb
28          - mediatek,mt8188-smi-larb
29          - mediatek,mt8192-smi-larb
30          - mediatek,mt8195-smi-larb
31
32      - description: for mt7623
33        items:
34          - const: mediatek,mt7623-smi-larb
35          - const: mediatek,mt2701-smi-larb
36
37  reg:
38    maxItems: 1
39
40  clocks:
41    description: |
42      apb and smi are mandatory. gals(global async local sync) is optional.
43    minItems: 2
44    items:
45      - description: apb is Advanced Peripheral Bus clock, It's the clock for
46          setting the register.
47      - description: smi is the clock for transfer data and command.
48      - description: the clock for gals.
49
50  clock-names:
51    minItems: 2
52    maxItems: 3
53
54  power-domains:
55    maxItems: 1
56
57  mediatek,smi:
58    $ref: /schemas/types.yaml#/definitions/phandle
59    description: a phandle to the smi_common node.
60
61  mediatek,larb-id:
62    $ref: /schemas/types.yaml#/definitions/uint32
63    minimum: 0
64    maximum: 31
65    description: the hardware id of this larb. It's only required when this
66      hardward id is not consecutive from its M4U point of view.
67
68required:
69  - compatible
70  - reg
71  - clocks
72  - clock-names
73  - power-domains
74
75allOf:
76  - if:  # HW has gals
77      properties:
78        compatible:
79          enum:
80            - mediatek,mt8183-smi-larb
81            - mediatek,mt8186-smi-larb
82            - mediatek,mt8188-smi-larb
83            - mediatek,mt8195-smi-larb
84
85    then:
86      properties:
87        clocks:
88          minItems: 2
89          maxItems: 3
90        clock-names:
91          minItems: 2
92          items:
93            - const: apb
94            - const: smi
95            - const: gals
96
97    else:
98      properties:
99        clocks:
100          minItems: 2
101          maxItems: 2
102        clock-names:
103          items:
104            - const: apb
105            - const: smi
106
107  - if:
108      properties:
109        compatible:
110          contains:
111            enum:
112              - mediatek,mt2701-smi-larb
113              - mediatek,mt2712-smi-larb
114              - mediatek,mt6779-smi-larb
115              - mediatek,mt8186-smi-larb
116              - mediatek,mt8188-smi-larb
117              - mediatek,mt8192-smi-larb
118              - mediatek,mt8195-smi-larb
119
120    then:
121      required:
122        - mediatek,larb-id
123
124additionalProperties: false
125
126examples:
127  - |+
128    #include <dt-bindings/clock/mt8173-clk.h>
129    #include <dt-bindings/power/mt8173-power.h>
130
131    larb1: larb@16010000 {
132      compatible = "mediatek,mt8173-smi-larb";
133      reg = <0x16010000 0x1000>;
134      mediatek,smi = <&smi_common>;
135      power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
136      clocks = <&vdecsys CLK_VDEC_CKEN>,
137               <&vdecsys CLK_VDEC_LARB_CKEN>;
138      clock-names = "apb", "smi";
139    };
140