1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: SMI (Smart Multimedia Interface) Local Arbiter
9
10maintainers:
11  - Yong Wu <yong.wu@mediatek.com>
12
13description: |
14  The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
15
16properties:
17  compatible:
18    oneOf:
19      - enum:
20          - mediatek,mt2701-smi-larb
21          - mediatek,mt2712-smi-larb
22          - mediatek,mt6779-smi-larb
23          - mediatek,mt6795-smi-larb
24          - mediatek,mt8167-smi-larb
25          - mediatek,mt8173-smi-larb
26          - mediatek,mt8183-smi-larb
27          - mediatek,mt8186-smi-larb
28          - mediatek,mt8188-smi-larb
29          - mediatek,mt8192-smi-larb
30          - mediatek,mt8195-smi-larb
31
32      - description: for mt7623
33        items:
34          - const: mediatek,mt7623-smi-larb
35          - const: mediatek,mt2701-smi-larb
36
37      - items:
38          - const: mediatek,mt8365-smi-larb
39          - const: mediatek,mt8186-smi-larb
40
41  reg:
42    maxItems: 1
43
44  clocks:
45    description: |
46      apb and smi are mandatory. gals(global async local sync) is optional.
47    minItems: 2
48    items:
49      - description: apb is Advanced Peripheral Bus clock, It's the clock for
50          setting the register.
51      - description: smi is the clock for transfer data and command.
52      - description: the clock for gals.
53
54  clock-names:
55    minItems: 2
56    maxItems: 3
57
58  power-domains:
59    maxItems: 1
60
61  mediatek,smi:
62    $ref: /schemas/types.yaml#/definitions/phandle
63    description: a phandle to the smi_common node.
64
65  mediatek,larb-id:
66    $ref: /schemas/types.yaml#/definitions/uint32
67    minimum: 0
68    maximum: 31
69    description: the hardware id of this larb. It's only required when this
70      hardward id is not consecutive from its M4U point of view.
71
72required:
73  - compatible
74  - reg
75  - clocks
76  - clock-names
77  - power-domains
78
79allOf:
80  - if:  # HW has gals
81      properties:
82        compatible:
83          enum:
84            - mediatek,mt8183-smi-larb
85            - mediatek,mt8186-smi-larb
86            - mediatek,mt8188-smi-larb
87            - mediatek,mt8195-smi-larb
88
89    then:
90      properties:
91        clocks:
92          minItems: 2
93          maxItems: 3
94        clock-names:
95          minItems: 2
96          items:
97            - const: apb
98            - const: smi
99            - const: gals
100
101    else:
102      properties:
103        clocks:
104          minItems: 2
105          maxItems: 2
106        clock-names:
107          items:
108            - const: apb
109            - const: smi
110
111  - if:
112      properties:
113        compatible:
114          contains:
115            enum:
116              - mediatek,mt2701-smi-larb
117              - mediatek,mt2712-smi-larb
118              - mediatek,mt6779-smi-larb
119              - mediatek,mt8186-smi-larb
120              - mediatek,mt8188-smi-larb
121              - mediatek,mt8192-smi-larb
122              - mediatek,mt8195-smi-larb
123
124    then:
125      required:
126        - mediatek,larb-id
127
128additionalProperties: false
129
130examples:
131  - |+
132    #include <dt-bindings/clock/mt8173-clk.h>
133    #include <dt-bindings/power/mt8173-power.h>
134
135    larb1: larb@16010000 {
136      compatible = "mediatek,mt8173-smi-larb";
137      reg = <0x16010000 0x1000>;
138      mediatek,smi = <&smi_common>;
139      power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
140      clocks = <&vdecsys CLK_VDEC_CKEN>,
141               <&vdecsys CLK_VDEC_LARB_CKEN>;
142      clock-names = "apb", "smi";
143    };
144