1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings
8
9maintainers:
10  - Paul Cercueil <paul@crapouillou.net>
11
12properties:
13  $nodename:
14    pattern: "^memory-controller@[0-9a-f]+$"
15
16  compatible:
17    oneOf:
18      - enum:
19        - ingenic,jz4740-nemc
20        - ingenic,jz4780-nemc
21      - items:
22        - const: ingenic,jz4725b-nemc
23        - const: ingenic,jz4740-nemc
24
25  "#address-cells":
26    const: 2
27
28  "#size-cells":
29    const: 1
30
31  ranges: true
32
33  reg:
34    maxItems: 1
35
36  clocks:
37    maxItems: 1
38
39patternProperties:
40  ".*@[0-9]+$":
41    type: object
42    properties:
43      reg:
44        minItems: 1
45        maxItems: 255
46
47      ingenic,nemc-bus-width:
48        allOf:
49          - $ref: /schemas/types.yaml#/definitions/uint32
50          - enum: [8, 16]
51        description: Specifies the bus width in bits.
52
53      ingenic,nemc-tAS:
54        $ref: /schemas/types.yaml#/definitions/uint32
55        description: Address setup time in nanoseconds.
56
57      ingenic,nemc-tAH:
58        $ref: /schemas/types.yaml#/definitions/uint32
59        description: Address hold time in nanoseconds.
60
61      ingenic,nemc-tBP:
62        $ref: /schemas/types.yaml#/definitions/uint32
63        description: Burst pitch time in nanoseconds.
64
65      ingenic,nemc-tAW:
66        $ref: /schemas/types.yaml#/definitions/uint32
67        description: Address wait time in nanoseconds.
68
69      ingenic,nemc-tSTRV:
70        $ref: /schemas/types.yaml#/definitions/uint32
71        description: Static memory recovery time in nanoseconds.
72
73    required:
74      - reg
75
76required:
77  - compatible
78  - "#address-cells"
79  - "#size-cells"
80  - ranges
81  - reg
82  - clocks
83
84additionalProperties: false
85
86examples:
87  - |
88    #include <dt-bindings/clock/jz4780-cgu.h>
89    #include <dt-bindings/gpio/gpio.h>
90    nemc: memory-controller@13410000 {
91      compatible = "ingenic,jz4780-nemc";
92      reg = <0x13410000 0x10000>;
93      #address-cells = <2>;
94      #size-cells = <1>;
95      ranges = <1 0 0x1b000000 0x1000000>,
96         <2 0 0x1a000000 0x1000000>,
97         <3 0 0x19000000 0x1000000>,
98         <4 0 0x18000000 0x1000000>,
99         <5 0 0x17000000 0x1000000>,
100         <6 0 0x16000000 0x1000000>;
101
102      clocks = <&cgu JZ4780_CLK_NEMC>;
103
104      ethernet@6 {
105        compatible = "davicom,dm9000";
106        davicom,no-eeprom;
107
108        pinctrl-names = "default";
109        pinctrl-0 = <&pins_nemc_cs6>;
110
111        reg = <6 0 1>, /* addr */
112              <6 2 1>; /* data */
113
114        ingenic,nemc-tAS = <15>;
115        ingenic,nemc-tAH = <10>;
116        ingenic,nemc-tBP = <20>;
117        ingenic,nemc-tAW = <50>;
118        ingenic,nemc-tSTRV = <100>;
119
120        reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
121        vcc-supply = <&eth0_power>;
122
123        interrupt-parent = <&gpe>;
124        interrupts = <19 4>;
125      };
126    };
127