1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings
8
9maintainers:
10  - Paul Cercueil <paul@crapouillou.net>
11
12properties:
13  $nodename:
14    pattern: "^memory-controller@[0-9a-f]+$"
15
16  compatible:
17    oneOf:
18      - enum:
19          - ingenic,jz4740-nemc
20          - ingenic,jz4780-nemc
21      - items:
22          - const: ingenic,jz4725b-nemc
23          - const: ingenic,jz4740-nemc
24
25  "#address-cells":
26    const: 2
27
28  "#size-cells":
29    const: 1
30
31  ranges: true
32
33  reg:
34    maxItems: 1
35
36  clocks:
37    maxItems: 1
38
39patternProperties:
40  ".*@[0-9]+$":
41    type: object
42    properties:
43      reg:
44        minItems: 1
45        maxItems: 255
46
47      ingenic,nemc-bus-width:
48        $ref: /schemas/types.yaml#/definitions/uint32
49        enum: [8, 16]
50        description: Specifies the bus width in bits.
51
52      ingenic,nemc-tAS:
53        $ref: /schemas/types.yaml#/definitions/uint32
54        description: Address setup time in nanoseconds.
55
56      ingenic,nemc-tAH:
57        $ref: /schemas/types.yaml#/definitions/uint32
58        description: Address hold time in nanoseconds.
59
60      ingenic,nemc-tBP:
61        $ref: /schemas/types.yaml#/definitions/uint32
62        description: Burst pitch time in nanoseconds.
63
64      ingenic,nemc-tAW:
65        $ref: /schemas/types.yaml#/definitions/uint32
66        description: Address wait time in nanoseconds.
67
68      ingenic,nemc-tSTRV:
69        $ref: /schemas/types.yaml#/definitions/uint32
70        description: Static memory recovery time in nanoseconds.
71
72    required:
73      - reg
74
75required:
76  - compatible
77  - "#address-cells"
78  - "#size-cells"
79  - ranges
80  - reg
81  - clocks
82
83additionalProperties: false
84
85examples:
86  - |
87    #include <dt-bindings/clock/jz4780-cgu.h>
88    #include <dt-bindings/gpio/gpio.h>
89    nemc: memory-controller@13410000 {
90      compatible = "ingenic,jz4780-nemc";
91      reg = <0x13410000 0x10000>;
92      #address-cells = <2>;
93      #size-cells = <1>;
94      ranges = <1 0 0x1b000000 0x1000000>,
95         <2 0 0x1a000000 0x1000000>,
96         <3 0 0x19000000 0x1000000>,
97         <4 0 0x18000000 0x1000000>,
98         <5 0 0x17000000 0x1000000>,
99         <6 0 0x16000000 0x1000000>;
100
101      clocks = <&cgu JZ4780_CLK_NEMC>;
102
103      ethernet@6 {
104        compatible = "davicom,dm9000";
105        davicom,no-eeprom;
106
107        pinctrl-names = "default";
108        pinctrl-0 = <&pins_nemc_cs6>;
109
110        reg = <6 0 1>, /* addr */
111              <6 2 1>; /* data */
112
113        ingenic,nemc-tAS = <15>;
114        ingenic,nemc-tAH = <10>;
115        ingenic,nemc-tBP = <20>;
116        ingenic,nemc-tAW = <50>;
117        ingenic,nemc-tSTRV = <100>;
118
119        reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>;
120        vcc-supply = <&eth0_power>;
121
122        interrupt-parent = <&gpe>;
123        interrupts = <19 4>;
124      };
125    };
126