1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Common properties for LPDDR types
8
9description:
10  Different LPDDR types generally use the same properties and only differ in the
11  range of legal values for each. This file defines the common parts that can be
12  reused for each type.
13
14maintainers:
15  - Krzysztof Kozlowski <krzk@kernel.org>
16
17properties:
18  compatible:
19    description:
20      Compatible strings can be either explicit vendor names and part numbers
21      (e.g. elpida,ECB240ABACN), or generated strings of the form
22      lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID
23      (from MR5) and ZZZZ is the revision ID (from MR6 and MR7). Both IDs are
24      formatted in lower case hexadecimal representation with leading zeroes.
25      The latter form can be useful when LPDDR nodes are created at runtime by
26      boot firmware that doesn't have access to static part number information.
27
28  revision-id:
29    $ref: /schemas/types.yaml#/definitions/uint32-array
30    description:
31      Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. <MR6 MR7>).
32    maxItems: 2
33    items:
34      minimum: 0
35      maximum: 255
36
37  density:
38    $ref: /schemas/types.yaml#/definitions/uint32
39    description:
40      Density in megabits of SDRAM chip. Decoded from Mode Register 8.
41    enum:
42      - 64
43      - 128
44      - 256
45      - 512
46      - 1024
47      - 2048
48      - 4096
49      - 8192
50      - 16384
51      - 32768
52
53  io-width:
54    $ref: /schemas/types.yaml#/definitions/uint32
55    description:
56      IO bus width in bits of SDRAM chip. Decoded from Mode Register 8.
57    enum:
58      - 8
59      - 16
60      - 32
61
62additionalProperties: true
63