19e5eb9a4SVishal Sagar# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 29e5eb9a4SVishal Sagar%YAML 1.2 39e5eb9a4SVishal Sagar--- 49e5eb9a4SVishal Sagar$id: http://devicetree.org/schemas/media/xilinx/xlnx,csi2rxss.yaml# 59e5eb9a4SVishal Sagar$schema: http://devicetree.org/meta-schemas/core.yaml# 69e5eb9a4SVishal Sagar 79e5eb9a4SVishal Sagartitle: Xilinx MIPI CSI-2 Receiver Subsystem 89e5eb9a4SVishal Sagar 99e5eb9a4SVishal Sagarmaintainers: 10*d5c421d2SMichal Simek - Vishal Sagar <vishal.sagar@amd.com> 119e5eb9a4SVishal Sagar 129e5eb9a4SVishal Sagardescription: | 139e5eb9a4SVishal Sagar The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2 149e5eb9a4SVishal Sagar traffic from compliant camera sensors and send the output as AXI4 Stream 159e5eb9a4SVishal Sagar video data for image processing. 169e5eb9a4SVishal Sagar The subsystem consists of a MIPI D-PHY in slave mode which captures the 179e5eb9a4SVishal Sagar data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the 189e5eb9a4SVishal Sagar packet data. The optional Video Format Bridge (VFB) converts this data to 199e5eb9a4SVishal Sagar AXI4 Stream video data. 209e5eb9a4SVishal Sagar For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem. 219e5eb9a4SVishal Sagar Please note that this bindings includes only the MIPI CSI-2 Rx controller 229e5eb9a4SVishal Sagar and Video Format Bridge and not D-PHY. 239e5eb9a4SVishal Sagar 249e5eb9a4SVishal Sagarproperties: 259e5eb9a4SVishal Sagar compatible: 269e5eb9a4SVishal Sagar items: 279e5eb9a4SVishal Sagar - enum: 289e5eb9a4SVishal Sagar - xlnx,mipi-csi2-rx-subsystem-5.0 299e5eb9a4SVishal Sagar 309e5eb9a4SVishal Sagar reg: 319e5eb9a4SVishal Sagar maxItems: 1 329e5eb9a4SVishal Sagar 339e5eb9a4SVishal Sagar interrupts: 349e5eb9a4SVishal Sagar maxItems: 1 359e5eb9a4SVishal Sagar 369e5eb9a4SVishal Sagar clocks: 379e5eb9a4SVishal Sagar description: List of clock specifiers 389e5eb9a4SVishal Sagar items: 399e5eb9a4SVishal Sagar - description: AXI Lite clock 409e5eb9a4SVishal Sagar - description: Video clock 419e5eb9a4SVishal Sagar 429e5eb9a4SVishal Sagar clock-names: 439e5eb9a4SVishal Sagar items: 449e5eb9a4SVishal Sagar - const: lite_aclk 459e5eb9a4SVishal Sagar - const: video_aclk 469e5eb9a4SVishal Sagar 479e5eb9a4SVishal Sagar xlnx,csi-pxl-format: 489e5eb9a4SVishal Sagar description: | 499e5eb9a4SVishal Sagar This denotes the CSI Data type selected in hw design. 509e5eb9a4SVishal Sagar Packets other than this data type (except for RAW8 and 519e5eb9a4SVishal Sagar User defined data types) will be filtered out. 529e5eb9a4SVishal Sagar Possible values are as below - 539e5eb9a4SVishal Sagar 0x1e - YUV4228B 549e5eb9a4SVishal Sagar 0x1f - YUV42210B 559e5eb9a4SVishal Sagar 0x20 - RGB444 569e5eb9a4SVishal Sagar 0x21 - RGB555 579e5eb9a4SVishal Sagar 0x22 - RGB565 589e5eb9a4SVishal Sagar 0x23 - RGB666 599e5eb9a4SVishal Sagar 0x24 - RGB888 609e5eb9a4SVishal Sagar 0x28 - RAW6 619e5eb9a4SVishal Sagar 0x29 - RAW7 629e5eb9a4SVishal Sagar 0x2a - RAW8 639e5eb9a4SVishal Sagar 0x2b - RAW10 649e5eb9a4SVishal Sagar 0x2c - RAW12 659e5eb9a4SVishal Sagar 0x2d - RAW14 669e5eb9a4SVishal Sagar 0x2e - RAW16 679e5eb9a4SVishal Sagar 0x2f - RAW20 68f516fb70SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 69f516fb70SRob Herring oneOf: 709e5eb9a4SVishal Sagar - minimum: 0x1e 71f516fb70SRob Herring maximum: 0x24 729e5eb9a4SVishal Sagar - minimum: 0x28 73f516fb70SRob Herring maximum: 0x2f 749e5eb9a4SVishal Sagar 759e5eb9a4SVishal Sagar xlnx,vfb: 769e5eb9a4SVishal Sagar type: boolean 779e5eb9a4SVishal Sagar description: Present when Video Format Bridge is enabled in IP configuration 789e5eb9a4SVishal Sagar 799e5eb9a4SVishal Sagar xlnx,en-csi-v2-0: 809e5eb9a4SVishal Sagar type: boolean 819e5eb9a4SVishal Sagar description: Present if CSI v2 is enabled in IP configuration. 829e5eb9a4SVishal Sagar 839e5eb9a4SVishal Sagar xlnx,en-vcx: 849e5eb9a4SVishal Sagar type: boolean 859e5eb9a4SVishal Sagar description: | 869e5eb9a4SVishal Sagar When present, there are maximum 16 virtual channels, else only 4. 879e5eb9a4SVishal Sagar 889e5eb9a4SVishal Sagar xlnx,en-active-lanes: 899e5eb9a4SVishal Sagar type: boolean 909e5eb9a4SVishal Sagar description: | 919e5eb9a4SVishal Sagar Present if the number of active lanes can be re-configured at 929e5eb9a4SVishal Sagar runtime in the Protocol Configuration Register. Otherwise all lanes, 939e5eb9a4SVishal Sagar as set in IP configuration, are always active. 949e5eb9a4SVishal Sagar 959e5eb9a4SVishal Sagar video-reset-gpios: 969e5eb9a4SVishal Sagar description: Optional specifier for a GPIO that asserts video_aresetn. 979e5eb9a4SVishal Sagar maxItems: 1 989e5eb9a4SVishal Sagar 999e5eb9a4SVishal Sagar ports: 100066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/ports 1019e5eb9a4SVishal Sagar 1029e5eb9a4SVishal Sagar properties: 1039e5eb9a4SVishal Sagar port@0: 104066a94e2SRob Herring $ref: /schemas/graph.yaml#/$defs/port-base 1059e5eb9a4SVishal Sagar description: | 1069e5eb9a4SVishal Sagar Input / sink port node, single endpoint describing the 1079e5eb9a4SVishal Sagar CSI-2 transmitter. 1089e5eb9a4SVishal Sagar 1099e5eb9a4SVishal Sagar properties: 1109e5eb9a4SVishal Sagar endpoint: 111066a94e2SRob Herring $ref: /schemas/media/video-interfaces.yaml# 112066a94e2SRob Herring unevaluatedProperties: false 1139e5eb9a4SVishal Sagar 1149e5eb9a4SVishal Sagar properties: 1159e5eb9a4SVishal Sagar data-lanes: 1169e5eb9a4SVishal Sagar description: | 1179e5eb9a4SVishal Sagar This is required only in the sink port 0 endpoint which 1189e5eb9a4SVishal Sagar connects to MIPI CSI-2 source like sensor. 1199e5eb9a4SVishal Sagar The possible values are - 1209e5eb9a4SVishal Sagar 1 - For 1 lane enabled in IP. 1219e5eb9a4SVishal Sagar 1 2 - For 2 lanes enabled in IP. 1229e5eb9a4SVishal Sagar 1 2 3 - For 3 lanes enabled in IP. 1239e5eb9a4SVishal Sagar 1 2 3 4 - For 4 lanes enabled in IP. 1249e5eb9a4SVishal Sagar items: 1259e5eb9a4SVishal Sagar - const: 1 1269e5eb9a4SVishal Sagar - const: 2 1279e5eb9a4SVishal Sagar - const: 3 1289e5eb9a4SVishal Sagar - const: 4 1299e5eb9a4SVishal Sagar 1309e5eb9a4SVishal Sagar required: 1319e5eb9a4SVishal Sagar - data-lanes 1329e5eb9a4SVishal Sagar 133066a94e2SRob Herring unevaluatedProperties: false 1349e5eb9a4SVishal Sagar 1359e5eb9a4SVishal Sagar port@1: 136066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/port 1379e5eb9a4SVishal Sagar description: | 1389e5eb9a4SVishal Sagar Output / source port node, endpoint describing modules 1399e5eb9a4SVishal Sagar connected the CSI-2 receiver. 1409e5eb9a4SVishal Sagar 1419e5eb9a4SVishal Sagarrequired: 1429e5eb9a4SVishal Sagar - compatible 1439e5eb9a4SVishal Sagar - reg 1449e5eb9a4SVishal Sagar - interrupts 1459e5eb9a4SVishal Sagar - clocks 1469e5eb9a4SVishal Sagar - clock-names 1479e5eb9a4SVishal Sagar - ports 1489e5eb9a4SVishal Sagar 1499e5eb9a4SVishal SagarallOf: 1509e5eb9a4SVishal Sagar - if: 1519e5eb9a4SVishal Sagar required: 1529e5eb9a4SVishal Sagar - xlnx,vfb 1539e5eb9a4SVishal Sagar then: 1549e5eb9a4SVishal Sagar required: 1559e5eb9a4SVishal Sagar - xlnx,csi-pxl-format 1569e5eb9a4SVishal Sagar else: 1579e5eb9a4SVishal Sagar properties: 1589e5eb9a4SVishal Sagar xlnx,csi-pxl-format: false 1599e5eb9a4SVishal Sagar 1609e5eb9a4SVishal Sagar - if: 1619e5eb9a4SVishal Sagar not: 1629e5eb9a4SVishal Sagar required: 1639e5eb9a4SVishal Sagar - xlnx,en-csi-v2-0 1649e5eb9a4SVishal Sagar then: 1659e5eb9a4SVishal Sagar properties: 1669e5eb9a4SVishal Sagar xlnx,en-vcx: false 1679e5eb9a4SVishal Sagar 1689e5eb9a4SVishal SagaradditionalProperties: false 1699e5eb9a4SVishal Sagar 1709e5eb9a4SVishal Sagarexamples: 1719e5eb9a4SVishal Sagar - | 1729e5eb9a4SVishal Sagar #include <dt-bindings/gpio/gpio.h> 1739e5eb9a4SVishal Sagar xcsi2rxss_1: csi2rx@a0020000 { 1749e5eb9a4SVishal Sagar compatible = "xlnx,mipi-csi2-rx-subsystem-5.0"; 1759e5eb9a4SVishal Sagar reg = <0xa0020000 0x10000>; 1769e5eb9a4SVishal Sagar interrupt-parent = <&gic>; 1779e5eb9a4SVishal Sagar interrupts = <0 95 4>; 1789e5eb9a4SVishal Sagar xlnx,csi-pxl-format = <0x2a>; 1799e5eb9a4SVishal Sagar xlnx,vfb; 1809e5eb9a4SVishal Sagar xlnx,en-active-lanes; 1819e5eb9a4SVishal Sagar xlnx,en-csi-v2-0; 1829e5eb9a4SVishal Sagar xlnx,en-vcx; 1839e5eb9a4SVishal Sagar clock-names = "lite_aclk", "video_aclk"; 1849e5eb9a4SVishal Sagar clocks = <&misc_clk_0>, <&misc_clk_1>; 1859e5eb9a4SVishal Sagar video-reset-gpios = <&gpio 86 GPIO_ACTIVE_LOW>; 1869e5eb9a4SVishal Sagar 1879e5eb9a4SVishal Sagar ports { 1889e5eb9a4SVishal Sagar #address-cells = <1>; 1899e5eb9a4SVishal Sagar #size-cells = <0>; 1909e5eb9a4SVishal Sagar 1919e5eb9a4SVishal Sagar port@0 { 1929e5eb9a4SVishal Sagar /* Sink port */ 1939e5eb9a4SVishal Sagar reg = <0>; 1949e5eb9a4SVishal Sagar csiss_in: endpoint { 1959e5eb9a4SVishal Sagar data-lanes = <1 2 3 4>; 1969e5eb9a4SVishal Sagar /* MIPI CSI-2 Camera handle */ 1979e5eb9a4SVishal Sagar remote-endpoint = <&camera_out>; 1989e5eb9a4SVishal Sagar }; 1999e5eb9a4SVishal Sagar }; 2009e5eb9a4SVishal Sagar port@1 { 2019e5eb9a4SVishal Sagar /* Source port */ 2029e5eb9a4SVishal Sagar reg = <1>; 2039e5eb9a4SVishal Sagar csiss_out: endpoint { 2049e5eb9a4SVishal Sagar remote-endpoint = <&vproc_in>; 2059e5eb9a4SVishal Sagar }; 2069e5eb9a4SVishal Sagar }; 2079e5eb9a4SVishal Sagar }; 2089e5eb9a4SVishal Sagar }; 2099e5eb9a4SVishal Sagar... 210