1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/media/rockchip-vpu.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Hantro G1 VPU codecs implemented on Rockchip SoCs 9 10maintainers: 11 - Ezequiel Garcia <ezequiel@collabora.com> 12 13description: 14 Hantro G1 video encode and decode accelerators present on Rockchip SoCs. 15 16properties: 17 compatible: 18 oneOf: 19 - enum: 20 - rockchip,rk3036-vpu 21 - rockchip,rk3066-vpu 22 - rockchip,rk3288-vpu 23 - rockchip,rk3328-vpu 24 - rockchip,rk3399-vpu 25 - items: 26 - const: rockchip,rk3188-vpu 27 - const: rockchip,rk3066-vpu 28 - items: 29 - const: rockchip,rk3228-vpu 30 - const: rockchip,rk3399-vpu 31 32 reg: 33 maxItems: 1 34 35 interrupts: 36 minItems: 1 37 maxItems: 2 38 39 interrupt-names: 40 oneOf: 41 - const: vdpu 42 - items: 43 - const: vepu 44 - const: vdpu 45 46 clocks: 47 oneOf: 48 - maxItems: 2 49 - maxItems: 4 50 51 clock-names: 52 oneOf: 53 - items: 54 - const: aclk 55 - const: hclk 56 - items: 57 - const: aclk_vdpu 58 - const: hclk_vdpu 59 - const: aclk_vepu 60 - const: hclk_vepu 61 62 power-domains: 63 maxItems: 1 64 65 iommus: 66 maxItems: 1 67 68required: 69 - compatible 70 - reg 71 - interrupts 72 - interrupt-names 73 - clocks 74 - clock-names 75 76additionalProperties: false 77 78examples: 79 - | 80 #include <dt-bindings/clock/rk3288-cru.h> 81 #include <dt-bindings/interrupt-controller/arm-gic.h> 82 #include <dt-bindings/power/rk3288-power.h> 83 84 vpu: video-codec@ff9a0000 { 85 compatible = "rockchip,rk3288-vpu"; 86 reg = <0xff9a0000 0x800>; 87 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 88 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 89 interrupt-names = "vepu", "vdpu"; 90 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; 91 clock-names = "aclk", "hclk"; 92 power-domains = <&power RK3288_PD_VIDEO>; 93 iommus = <&vpu_mmu>; 94 }; 95