1# SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip SoC Image Signal Processing unit v1 8 9maintainers: 10 - Helen Koike <helen.koike@collabora.com> 11 12description: | 13 Rockchip ISP1 is the Camera interface for the Rockchip series of SoCs 14 which contains image processing, scaling, and compression functions. 15 16properties: 17 compatible: 18 const: rockchip,rk3399-cif-isp 19 20 reg: 21 maxItems: 1 22 23 interrupts: 24 maxItems: 1 25 26 clocks: 27 minItems: 3 28 items: 29 # isp0 and isp1 30 - description: ISP clock 31 - description: ISP AXI clock 32 - description: ISP AHB clock 33 # only for isp1 34 - description: ISP Pixel clock 35 36 clock-names: 37 minItems: 3 38 items: 39 # isp0 and isp1 40 - const: isp 41 - const: aclk 42 - const: hclk 43 # only for isp1 44 - const: pclk_isp 45 46 iommus: 47 maxItems: 1 48 49 phys: 50 maxItems: 1 51 description: phandle for the PHY port 52 53 phy-names: 54 const: dphy 55 56 power-domains: 57 maxItems: 1 58 59 ports: 60 $ref: /schemas/graph.yaml#/properties/ports 61 62 properties: 63 port@0: 64 $ref: /schemas/graph.yaml#/$defs/port-base 65 unevaluatedProperties: false 66 description: connection point for sensors at MIPI-DPHY RX0 67 68 properties: 69 endpoint: 70 $ref: video-interfaces.yaml# 71 unevaluatedProperties: false 72 73 properties: 74 data-lanes: 75 minItems: 1 76 maxItems: 4 77 78 required: 79 - port@0 80 81required: 82 - compatible 83 - reg 84 - interrupts 85 - clocks 86 - clock-names 87 - iommus 88 - phys 89 - phy-names 90 - power-domains 91 - ports 92 93if: 94 properties: 95 compatible: 96 contains: 97 const: rockchip,rk3399-cif-isp 98then: 99 properties: 100 clocks: 101 minItems: 3 102 maxItems: 4 103 clock-names: 104 minItems: 3 105 maxItems: 4 106 107additionalProperties: false 108 109examples: 110 - | 111 112 #include <dt-bindings/clock/rk3399-cru.h> 113 #include <dt-bindings/interrupt-controller/arm-gic.h> 114 #include <dt-bindings/power/rk3399-power.h> 115 116 parent0: parent { 117 #address-cells = <2>; 118 #size-cells = <2>; 119 120 isp0: isp0@ff910000 { 121 compatible = "rockchip,rk3399-cif-isp"; 122 reg = <0x0 0xff910000 0x0 0x4000>; 123 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>; 124 clocks = <&cru SCLK_ISP0>, 125 <&cru ACLK_ISP0_WRAPPER>, 126 <&cru HCLK_ISP0_WRAPPER>; 127 clock-names = "isp", "aclk", "hclk"; 128 iommus = <&isp0_mmu>; 129 phys = <&dphy>; 130 phy-names = "dphy"; 131 power-domains = <&power RK3399_PD_ISP0>; 132 133 ports { 134 #address-cells = <1>; 135 #size-cells = <0>; 136 137 port@0 { 138 reg = <0>; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 142 mipi_in_wcam: endpoint@0 { 143 reg = <0>; 144 remote-endpoint = <&wcam_out>; 145 data-lanes = <1 2>; 146 }; 147 148 mipi_in_ucam: endpoint@1 { 149 reg = <1>; 150 remote-endpoint = <&ucam_out>; 151 data-lanes = <1>; 152 }; 153 }; 154 }; 155 }; 156 157 i2c7: i2c { 158 #address-cells = <1>; 159 #size-cells = <0>; 160 161 wcam: camera@36 { 162 compatible = "ovti,ov5695"; 163 reg = <0x36>; 164 165 port { 166 wcam_out: endpoint { 167 remote-endpoint = <&mipi_in_wcam>; 168 data-lanes = <1 2>; 169 }; 170 }; 171 }; 172 173 ucam: camera@3c { 174 compatible = "ovti,ov2685"; 175 reg = <0x3c>; 176 177 port { 178 ucam_out: endpoint { 179 remote-endpoint = <&mipi_in_ucam>; 180 data-lanes = <1>; 181 }; 182 }; 183 }; 184 }; 185 }; 186