1# SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip SoC Image Signal Processing unit v1 8 9maintainers: 10 - Helen Koike <helen.koike@collabora.com> 11 12description: | 13 Rockchip ISP1 is the Camera interface for the Rockchip series of SoCs 14 which contains image processing, scaling, and compression functions. 15 16properties: 17 compatible: 18 enum: 19 - rockchip,px30-cif-isp 20 - rockchip,rk3399-cif-isp 21 22 reg: 23 maxItems: 1 24 25 interrupts: 26 minItems: 1 27 maxItems: 3 28 29 interrupt-names: 30 items: 31 - const: isp 32 - const: mi 33 - const: mipi 34 35 clocks: 36 minItems: 3 37 items: 38 # isp0 and isp1 39 - description: ISP clock 40 - description: ISP AXI clock 41 - description: ISP AHB clock 42 # only for isp1 43 - description: ISP Pixel clock 44 45 clock-names: 46 minItems: 3 47 items: 48 # isp0 and isp1 49 - const: isp 50 - const: aclk 51 - const: hclk 52 # only for isp1 53 - const: pclk 54 55 iommus: 56 maxItems: 1 57 58 phys: 59 maxItems: 1 60 description: phandle for the PHY port 61 62 phy-names: 63 const: dphy 64 65 power-domains: 66 maxItems: 1 67 68 ports: 69 $ref: /schemas/graph.yaml#/properties/ports 70 71 properties: 72 port@0: 73 $ref: /schemas/graph.yaml#/$defs/port-base 74 unevaluatedProperties: false 75 description: connection point for sensors at MIPI-DPHY RX0 76 77 properties: 78 endpoint: 79 $ref: video-interfaces.yaml# 80 unevaluatedProperties: false 81 82 properties: 83 data-lanes: 84 minItems: 1 85 maxItems: 4 86 87 required: 88 - port@0 89 90required: 91 - compatible 92 - reg 93 - interrupts 94 - clocks 95 - clock-names 96 - iommus 97 - phys 98 - phy-names 99 - power-domains 100 - ports 101 102allOf: 103 - if: 104 properties: 105 compatible: 106 contains: 107 const: rockchip,rk3399-cif-isp 108 then: 109 properties: 110 clocks: 111 minItems: 3 112 maxItems: 4 113 clock-names: 114 minItems: 3 115 maxItems: 4 116 117 - if: 118 properties: 119 compatible: 120 contains: 121 const: rockchip,px30-cif-isp 122 then: 123 required: 124 - interrupt-names 125 126additionalProperties: false 127 128examples: 129 - | 130 131 #include <dt-bindings/clock/rk3399-cru.h> 132 #include <dt-bindings/interrupt-controller/arm-gic.h> 133 #include <dt-bindings/power/rk3399-power.h> 134 135 parent0: parent { 136 #address-cells = <2>; 137 #size-cells = <2>; 138 139 isp0: isp0@ff910000 { 140 compatible = "rockchip,rk3399-cif-isp"; 141 reg = <0x0 0xff910000 0x0 0x4000>; 142 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>; 143 clocks = <&cru SCLK_ISP0>, 144 <&cru ACLK_ISP0_WRAPPER>, 145 <&cru HCLK_ISP0_WRAPPER>; 146 clock-names = "isp", "aclk", "hclk"; 147 iommus = <&isp0_mmu>; 148 phys = <&dphy>; 149 phy-names = "dphy"; 150 power-domains = <&power RK3399_PD_ISP0>; 151 152 ports { 153 #address-cells = <1>; 154 #size-cells = <0>; 155 156 port@0 { 157 reg = <0>; 158 #address-cells = <1>; 159 #size-cells = <0>; 160 161 mipi_in_wcam: endpoint@0 { 162 reg = <0>; 163 remote-endpoint = <&wcam_out>; 164 data-lanes = <1 2>; 165 }; 166 167 mipi_in_ucam: endpoint@1 { 168 reg = <1>; 169 remote-endpoint = <&ucam_out>; 170 data-lanes = <1>; 171 }; 172 }; 173 }; 174 }; 175 176 i2c7: i2c { 177 #address-cells = <1>; 178 #size-cells = <0>; 179 180 wcam: camera@36 { 181 compatible = "ovti,ov5695"; 182 reg = <0x36>; 183 184 port { 185 wcam_out: endpoint { 186 remote-endpoint = <&mipi_in_wcam>; 187 data-lanes = <1 2>; 188 }; 189 }; 190 }; 191 192 ucam: camera@3c { 193 compatible = "ovti,ov2685"; 194 reg = <0x3c>; 195 196 port { 197 ucam_out: endpoint { 198 remote-endpoint = <&mipi_in_ucam>; 199 data-lanes = <1>; 200 }; 201 }; 202 }; 203 }; 204 }; 205 206 - | 207 208 #include <dt-bindings/interrupt-controller/arm-gic.h> 209 #include <dt-bindings/power/px30-power.h> 210 211 parent1: parent { 212 #address-cells = <2>; 213 #size-cells = <2>; 214 215 isp: isp@ff4a0000 { 216 compatible = "rockchip,px30-cif-isp"; 217 reg = <0x0 0xff4a0000 0x0 0x8000>; 218 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 219 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>, 220 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 221 interrupt-names = "isp", "mi", "mipi"; 222 clocks = <&cru SCLK_ISP0>, 223 <&cru ACLK_ISP0_WRAPPER>, 224 <&cru HCLK_ISP0_WRAPPER>, 225 <&cru PCLK_ISP1_WRAPPER>; 226 clock-names = "isp", "aclk", "hclk", "pclk"; 227 iommus = <&isp_mmu>; 228 phys = <&csi_dphy>; 229 phy-names = "dphy"; 230 power-domains = <&power PX30_PD_VI>; 231 232 ports { 233 #address-cells = <1>; 234 #size-cells = <0>; 235 236 port@0 { 237 reg = <0>; 238 #address-cells = <1>; 239 #size-cells = <0>; 240 241 mipi_in_ucam1: endpoint@0 { 242 reg = <0>; 243 remote-endpoint = <&ucam1_out>; 244 data-lanes = <1 2>; 245 }; 246 }; 247 }; 248 }; 249 250 i2c2: i2c { 251 #address-cells = <1>; 252 #size-cells = <0>; 253 254 ov5695: camera@36 { 255 compatible = "ovti,ov5647"; 256 reg = <0x36>; 257 clocks = <&cru SCLK_CIF_OUT>; 258 259 port { 260 ucam1_out: endpoint { 261 remote-endpoint = <&mipi_in_ucam1>; 262 data-lanes = <1 2>; 263 }; 264 }; 265 }; 266 }; 267 }; 268