1d6b50a96SBoris Brezillon# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2d6b50a96SBoris Brezillon%YAML 1.2
3d6b50a96SBoris Brezillon---
4d6b50a96SBoris Brezillon$id: http://devicetree.org/schemas/media/rockchip,vdec.yaml#
5d6b50a96SBoris Brezillon$schema: http://devicetree.org/meta-schemas/core.yaml#
6d6b50a96SBoris Brezillon
7*dd3cb467SAndrew Lunntitle: Rockchip Video Decoder (VDec)
8d6b50a96SBoris Brezillon
9d6b50a96SBoris Brezillonmaintainers:
10d6b50a96SBoris Brezillon  - Heiko Stuebner <heiko@sntech.de>
11d6b50a96SBoris Brezillon
12d6b50a96SBoris Brezillondescription: |-
13d6b50a96SBoris Brezillon  The Rockchip rk3399 has a stateless Video Decoder that can decodes H.264,
14d6b50a96SBoris Brezillon  HEVC an VP9 streams.
15d6b50a96SBoris Brezillon
16d6b50a96SBoris Brezillonproperties:
17d6b50a96SBoris Brezillon  compatible:
18502cf736SAlex Bee    oneOf:
19502cf736SAlex Bee      - const: rockchip,rk3399-vdec
20502cf736SAlex Bee      - items:
2160bc8c56SChristopher Obbard          - enum:
2260bc8c56SChristopher Obbard              - rockchip,rk3228-vdec
2360bc8c56SChristopher Obbard              - rockchip,rk3328-vdec
24502cf736SAlex Bee          - const: rockchip,rk3399-vdec
25d6b50a96SBoris Brezillon
26d6b50a96SBoris Brezillon  reg:
27d6b50a96SBoris Brezillon    maxItems: 1
28d6b50a96SBoris Brezillon
29d6b50a96SBoris Brezillon  interrupts:
30d6b50a96SBoris Brezillon    maxItems: 1
31d6b50a96SBoris Brezillon
32d6b50a96SBoris Brezillon  clocks:
33d6b50a96SBoris Brezillon    items:
34d6b50a96SBoris Brezillon      - description: The Video Decoder AXI interface clock
35d6b50a96SBoris Brezillon      - description: The Video Decoder AHB interface clock
36d6b50a96SBoris Brezillon      - description: The Video Decoded CABAC clock
37d6b50a96SBoris Brezillon      - description: The Video Decoder core clock
38d6b50a96SBoris Brezillon
39d6b50a96SBoris Brezillon  clock-names:
40d6b50a96SBoris Brezillon    items:
41d6b50a96SBoris Brezillon      - const: axi
42d6b50a96SBoris Brezillon      - const: ahb
43d6b50a96SBoris Brezillon      - const: cabac
44d6b50a96SBoris Brezillon      - const: core
45d6b50a96SBoris Brezillon
46502cf736SAlex Bee  assigned-clocks: true
47502cf736SAlex Bee
48502cf736SAlex Bee  assigned-clock-rates: true
49502cf736SAlex Bee
50d6b50a96SBoris Brezillon  power-domains:
51d6b50a96SBoris Brezillon    maxItems: 1
52d6b50a96SBoris Brezillon
53d6b50a96SBoris Brezillon  iommus:
54d6b50a96SBoris Brezillon    maxItems: 1
55d6b50a96SBoris Brezillon
56d6b50a96SBoris Brezillonrequired:
57d6b50a96SBoris Brezillon  - compatible
58d6b50a96SBoris Brezillon  - reg
59d6b50a96SBoris Brezillon  - interrupts
60d6b50a96SBoris Brezillon  - clocks
61d6b50a96SBoris Brezillon  - clock-names
62d6b50a96SBoris Brezillon  - power-domains
63d6b50a96SBoris Brezillon
64d6b50a96SBoris BrezillonadditionalProperties: false
65d6b50a96SBoris Brezillon
66d6b50a96SBoris Brezillonexamples:
67d6b50a96SBoris Brezillon  - |
68d6b50a96SBoris Brezillon    #include <dt-bindings/interrupt-controller/arm-gic.h>
69d6b50a96SBoris Brezillon    #include <dt-bindings/clock/rk3399-cru.h>
70d6b50a96SBoris Brezillon    #include <dt-bindings/power/rk3399-power.h>
71d6b50a96SBoris Brezillon
72d6b50a96SBoris Brezillon    vdec: video-codec@ff660000 {
73d6b50a96SBoris Brezillon        compatible = "rockchip,rk3399-vdec";
740db958b6SRob Herring        reg = <0xff660000 0x400>;
75d6b50a96SBoris Brezillon        interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
76d6b50a96SBoris Brezillon        clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
77d6b50a96SBoris Brezillon                 <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
78d6b50a96SBoris Brezillon        clock-names = "axi", "ahb", "cabac", "core";
79d6b50a96SBoris Brezillon        power-domains = <&power RK3399_PD_VDU>;
80d6b50a96SBoris Brezillon        iommus = <&vdec_mmu>;
81d6b50a96SBoris Brezillon    };
82d6b50a96SBoris Brezillon
83d6b50a96SBoris Brezillon...
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