1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/renesas,vsp1.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas VSP Video Processing Engine 8 9maintainers: 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 11 12description: 13 The VSP is a video processing engine that supports up-/down-scaling, alpha 14 blending, color space conversion and various other image processing features. 15 It can be found in the Renesas R-Car Gen2, R-Car Gen3, RZ/G1, and RZ/G2 SoCs. 16 17properties: 18 compatible: 19 enum: 20 - renesas,vsp1 # R-Car Gen2 and RZ/G1 21 - renesas,vsp2 # R-Car Gen3 and RZ/G2 22 23 reg: 24 maxItems: 1 25 26 interrupts: 27 maxItems: 1 28 29 clocks: 30 maxItems: 1 31 32 power-domains: 33 maxItems: 1 34 35 resets: 36 maxItems: 1 37 38 renesas,fcp: 39 $ref: /schemas/types.yaml#/definitions/phandle 40 description: 41 A phandle referencing the FCP that handles memory accesses for the VSP. 42 43required: 44 - compatible 45 - reg 46 - interrupts 47 - clocks 48 - power-domains 49 - resets 50 51additionalProperties: false 52 53if: 54 properties: 55 compatible: 56 items: 57 - const: renesas,vsp1 58then: 59 properties: 60 renesas,fcp: false 61else: 62 required: 63 - renesas,fcp 64 65examples: 66 # R8A7790 (R-Car H2) VSP1-S 67 - | 68 #include <dt-bindings/clock/renesas-cpg-mssr.h> 69 #include <dt-bindings/interrupt-controller/arm-gic.h> 70 #include <dt-bindings/power/r8a7790-sysc.h> 71 72 vsp@fe928000 { 73 compatible = "renesas,vsp1"; 74 reg = <0xfe928000 0x8000>; 75 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 76 clocks = <&cpg CPG_MOD 131>; 77 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 78 resets = <&cpg 131>; 79 }; 80 81 # R8A77951 (R-Car H3) VSP2-BC 82 - | 83 #include <dt-bindings/clock/renesas-cpg-mssr.h> 84 #include <dt-bindings/interrupt-controller/arm-gic.h> 85 #include <dt-bindings/power/r8a7795-sysc.h> 86 87 vsp@fe920000 { 88 compatible = "renesas,vsp2"; 89 reg = <0xfe920000 0x8000>; 90 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 91 clocks = <&cpg CPG_MOD 624>; 92 power-domains = <&sysc R8A7795_PD_A3VP>; 93 resets = <&cpg 624>; 94 95 renesas,fcp = <&fcpvb1>; 96 }; 97... 98