1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Qualcomm Venus video encode and decode accelerators 9 10maintainers: 11 - Stanimir Varbanov <stanimir.varbanov@linaro.org> 12 13description: | 14 The Venus IP is a video encode and decode accelerator present 15 on Qualcomm platforms 16 17properties: 18 compatible: 19 const: qcom,sdm845-venus 20 21 reg: 22 maxItems: 1 23 24 interrupts: 25 maxItems: 1 26 27 power-domains: 28 maxItems: 1 29 30 clocks: 31 maxItems: 3 32 33 clock-names: 34 items: 35 - const: core 36 - const: iface 37 - const: bus 38 39 iommus: 40 maxItems: 2 41 42 memory-region: 43 maxItems: 1 44 45 video-core0: 46 type: object 47 48 properties: 49 compatible: 50 const: venus-decoder 51 52 clocks: 53 maxItems: 2 54 55 clock-names: 56 items: 57 - const: core 58 - const: bus 59 60 power-domains: 61 maxItems: 1 62 63 required: 64 - compatible 65 - clocks 66 - clock-names 67 - power-domains 68 69 additionalProperties: false 70 71 video-core1: 72 type: object 73 74 properties: 75 compatible: 76 const: venus-encoder 77 78 clocks: 79 maxItems: 2 80 81 clock-names: 82 items: 83 - const: core 84 - const: bus 85 86 power-domains: 87 maxItems: 1 88 89 required: 90 - compatible 91 - clocks 92 - clock-names 93 - power-domains 94 95 additionalProperties: false 96 97 video-firmware: 98 type: object 99 100 description: | 101 Firmware subnode is needed when the platform does not 102 have TrustZone. 103 104 properties: 105 iommus: 106 maxItems: 1 107 108 required: 109 - iommus 110 111required: 112 - compatible 113 - reg 114 - interrupts 115 - power-domains 116 - clocks 117 - clock-names 118 - iommus 119 - memory-region 120 - video-core0 121 - video-core1 122 123examples: 124 - | 125 #include <dt-bindings/interrupt-controller/arm-gic.h> 126 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 127 128 video-codec@aa00000 { 129 compatible = "qcom,sdm845-venus"; 130 reg = <0 0x0aa00000 0 0xff000>; 131 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 132 clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, 133 <&videocc VIDEO_CC_VENUS_AHB_CLK>, 134 <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>; 135 clock-names = "core", "iface", "bus"; 136 power-domains = <&videocc VENUS_GDSC>; 137 iommus = <&apps_smmu 0x10a0 0x8>, 138 <&apps_smmu 0x10b0 0x0>; 139 memory-region = <&venus_mem>; 140 141 video-core0 { 142 compatible = "venus-decoder"; 143 clocks = <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, 144 <&videocc VIDEO_CC_VCODEC0_AXI_CLK>; 145 clock-names = "core", "bus"; 146 power-domains = <&videocc VCODEC0_GDSC>; 147 }; 148 149 video-core1 { 150 compatible = "venus-encoder"; 151 clocks = <&videocc VIDEO_CC_VCODEC1_CORE_CLK>, 152 <&videocc VIDEO_CC_VCODEC1_AXI_CLK>; 153 clock-names = "core", "bus"; 154 power-domains = <&videocc VCODEC1_GDSC>; 155 }; 156 }; 157