1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SDM845 Venus v2 video encode and decode accelerators
8
9maintainers:
10  - Stanimir Varbanov <stanimir.varbanov@linaro.org>
11
12description: |
13  The Venus IP is a video encode and decode accelerator present
14  on Qualcomm platforms
15
16allOf:
17  - $ref: qcom,venus-common.yaml#
18
19properties:
20  compatible:
21    const: qcom,sdm845-venus-v2
22
23  power-domains:
24    minItems: 3
25    maxItems: 4
26
27  power-domain-names:
28    minItems: 3
29    items:
30      - const: venus
31      - const: vcodec0
32      - const: vcodec1
33      - const: cx
34
35  clocks:
36    maxItems: 7
37
38  clock-names:
39    items:
40      - const: core
41      - const: iface
42      - const: bus
43      - const: vcodec0_core
44      - const: vcodec0_bus
45      - const: vcodec1_core
46      - const: vcodec1_bus
47
48  iommus:
49    maxItems: 2
50
51  video-core0:
52    type: object
53
54    properties:
55      compatible:
56        const: venus-decoder
57
58    required:
59      - compatible
60
61    additionalProperties: false
62
63  video-core1:
64    type: object
65
66    properties:
67      compatible:
68        const: venus-encoder
69
70    required:
71      - compatible
72
73    additionalProperties: false
74
75required:
76  - compatible
77  - power-domain-names
78  - iommus
79  - video-core0
80  - video-core1
81
82unevaluatedProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/interrupt-controller/arm-gic.h>
87    #include <dt-bindings/clock/qcom,videocc-sdm845.h>
88
89    video-codec@aa00000 {
90        compatible = "qcom,sdm845-venus-v2";
91        reg = <0x0aa00000 0xff000>;
92        interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
93        clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
94                 <&videocc VIDEO_CC_VENUS_AHB_CLK>,
95                 <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
96                 <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
97                 <&videocc VIDEO_CC_VCODEC0_AXI_CLK>,
98                 <&videocc VIDEO_CC_VCODEC1_CORE_CLK>,
99                 <&videocc VIDEO_CC_VCODEC1_AXI_CLK>;
100        clock-names = "core", "iface", "bus",
101                      "vcodec0_core", "vcodec0_bus",
102                      "vcodec1_core", "vcodec1_bus";
103        power-domains = <&videocc VENUS_GDSC>,
104                        <&videocc VCODEC0_GDSC>,
105                        <&videocc VCODEC1_GDSC>;
106        power-domain-names = "venus", "vcodec0", "vcodec1";
107        iommus = <&apps_smmu 0x10a0 0x8>,
108                 <&apps_smmu 0x10b0 0x0>;
109        memory-region = <&venus_mem>;
110
111        video-core0 {
112            compatible = "venus-decoder";
113        };
114
115        video-core1 {
116            compatible = "venus-encoder";
117        };
118    };
119