1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2 3%YAML 1.2 4--- 5$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#" 6$schema: "http://devicetree.org/meta-schemas/core.yaml#" 7 8title: Qualcomm Venus video encode and decode accelerators 9 10maintainers: 11 - Stanimir Varbanov <stanimir.varbanov@linaro.org> 12 13description: | 14 The Venus IP is a video encode and decode accelerator present 15 on Qualcomm platforms 16 17properties: 18 compatible: 19 const: qcom,sdm845-venus-v2 20 21 reg: 22 maxItems: 1 23 24 interrupts: 25 maxItems: 1 26 27 power-domains: 28 minItems: 3 29 maxItems: 4 30 31 power-domain-names: 32 minItems: 3 33 maxItems: 4 34 items: 35 - const: venus 36 - const: vcodec0 37 - const: vcodec1 38 - const: cx 39 40 clocks: 41 maxItems: 7 42 43 clock-names: 44 items: 45 - const: core 46 - const: iface 47 - const: bus 48 - const: vcodec0_core 49 - const: vcodec0_bus 50 - const: vcodec1_core 51 - const: vcodec1_bus 52 53 iommus: 54 maxItems: 2 55 56 memory-region: 57 maxItems: 1 58 59 video-core0: 60 type: object 61 62 properties: 63 compatible: 64 const: venus-decoder 65 66 required: 67 - compatible 68 69 additionalProperties: false 70 71 video-core1: 72 type: object 73 74 properties: 75 compatible: 76 const: venus-encoder 77 78 required: 79 - compatible 80 81 additionalProperties: false 82 83 video-firmware: 84 type: object 85 86 description: | 87 Firmware subnode is needed when the platform does not 88 have TrustZone. 89 90 properties: 91 iommus: 92 maxItems: 1 93 94 required: 95 - iommus 96 97required: 98 - compatible 99 - reg 100 - interrupts 101 - power-domains 102 - power-domain-names 103 - clocks 104 - clock-names 105 - iommus 106 - memory-region 107 - video-core0 108 - video-core1 109 110additionalProperties: false 111 112examples: 113 - | 114 #include <dt-bindings/interrupt-controller/arm-gic.h> 115 #include <dt-bindings/clock/qcom,videocc-sdm845.h> 116 117 video-codec@aa00000 { 118 compatible = "qcom,sdm845-venus-v2"; 119 reg = <0x0aa00000 0xff000>; 120 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 121 clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, 122 <&videocc VIDEO_CC_VENUS_AHB_CLK>, 123 <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>, 124 <&videocc VIDEO_CC_VCODEC0_CORE_CLK>, 125 <&videocc VIDEO_CC_VCODEC0_AXI_CLK>, 126 <&videocc VIDEO_CC_VCODEC1_CORE_CLK>, 127 <&videocc VIDEO_CC_VCODEC1_AXI_CLK>; 128 clock-names = "core", "iface", "bus", 129 "vcodec0_core", "vcodec0_bus", 130 "vcodec1_core", "vcodec1_bus"; 131 power-domains = <&videocc VENUS_GDSC>, 132 <&videocc VCODEC0_GDSC>, 133 <&videocc VCODEC1_GDSC>; 134 power-domain-names = "venus", "vcodec0", "vcodec1"; 135 iommus = <&apps_smmu 0x10a0 0x8>, 136 <&apps_smmu 0x10b0 0x0>; 137 memory-region = <&venus_mem>; 138 139 video-core0 { 140 compatible = "venus-decoder"; 141 }; 142 143 video-core1 { 144 compatible = "venus-encoder"; 145 }; 146 }; 147