1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs
9
10maintainers:
11  - Philipp Zabel <p.zabel@pengutronix.de>
12
13description:
14  Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
15
16properties:
17  compatible:
18    oneOf:
19      - const: nxp,imx8mq-vpu
20        deprecated: true
21      - const: nxp,imx8mq-vpu-g1
22      - const: nxp,imx8mq-vpu-g2
23      - const: nxp,imx8mm-vpu-g1
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clocks:
32    maxItems: 1
33
34  power-domains:
35    maxItems: 1
36
37required:
38  - compatible
39  - reg
40  - interrupts
41  - clocks
42
43additionalProperties: false
44
45examples:
46  - |
47        #include <dt-bindings/clock/imx8mq-clock.h>
48        #include <dt-bindings/power/imx8mq-power.h>
49        #include <dt-bindings/interrupt-controller/arm-gic.h>
50
51        vpu_g1: video-codec@38300000 {
52                compatible = "nxp,imx8mq-vpu-g1";
53                reg = <0x38300000 0x10000>;
54                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
55                clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
56                power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
57        };
58  - |
59        #include <dt-bindings/clock/imx8mq-clock.h>
60        #include <dt-bindings/power/imx8mq-power.h>
61        #include <dt-bindings/interrupt-controller/arm-gic.h>
62
63        vpu_g2: video-codec@38300000 {
64                compatible = "nxp,imx8mq-vpu-g2";
65                reg = <0x38310000 0x10000>;
66                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
67                clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
68                power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
69        };
70