1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
9
10maintainers:
11  - Philipp Zabel <p.zabel@pengutronix.de>
12
13description:
14  Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
15
16properties:
17  compatible:
18    const: nxp,imx8mq-vpu
19
20  reg:
21    maxItems: 3
22
23  reg-names:
24    items:
25      - const: g1
26      - const: g2
27      - const: ctrl
28
29  interrupts:
30    maxItems: 2
31
32  interrupt-names:
33    items:
34      - const: g1
35      - const: g2
36
37  clocks:
38    maxItems: 3
39
40  clock-names:
41    items:
42      - const: g1
43      - const: g2
44      - const: bus
45
46  power-domains:
47    maxItems: 1
48
49required:
50  - compatible
51  - reg
52  - reg-names
53  - interrupts
54  - interrupt-names
55  - clocks
56  - clock-names
57
58additionalProperties: false
59
60examples:
61  - |
62        #include <dt-bindings/clock/imx8mq-clock.h>
63        #include <dt-bindings/interrupt-controller/arm-gic.h>
64
65        vpu: video-codec@38300000 {
66                compatible = "nxp,imx8mq-vpu";
67                reg = <0x38300000 0x10000>,
68                      <0x38310000 0x10000>,
69                      <0x38320000 0x10000>;
70                reg-names = "g1", "g2", "ctrl";
71                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
72                             <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
73                interrupt-names = "g1", "g2";
74                clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
75                         <&clk IMX8MQ_CLK_VPU_G2_ROOT>,
76                         <&clk IMX8MQ_CLK_VPU_DEC_ROOT>;
77                clock-names = "g1", "g2", "bus";
78                power-domains = <&pgc_vpu>;
79        };
80