1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (C) 2021 Microchip Technology, Inc. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/media/microchip,xisc.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: Microchip eXtended Image Sensor Controller (XISC) 9 10maintainers: 11 - Eugen Hristev <eugen.hristev@microchip.com> 12 13description: | 14 The eXtended Image Sensor Controller (XISC) device provides the video input capabilities for the 15 Microchip AT91 SAM family of devices. 16 17 The XISC has a single internal parallel input that supports RAW Bayer, RGB or YUV video. 18 The source can be either a demuxer from a CSI2 type of bus, or a simple direct bridge to a 19 parallel sensor. 20 21 The XISC provides one clock output that is used to clock the demuxer/bridge. 22 23properties: 24 compatible: 25 const: microchip,sama7g5-isc 26 27 reg: 28 maxItems: 1 29 30 interrupts: 31 maxItems: 1 32 33 clocks: 34 maxItems: 1 35 36 clock-names: 37 items: 38 - const: hclock 39 40 '#clock-cells': 41 const: 0 42 43 clock-output-names: 44 const: isc-mck 45 46 microchip,mipi-mode: 47 type: boolean 48 description: 49 As the XISC is usually connected to a demux/bridge, the XISC receives 50 the same type of input, however, it should be aware of the type of 51 signals received. The mipi-mode enables different internal handling 52 of the data and clock lines. 53 54 port: 55 $ref: /schemas/graph.yaml#/$defs/port-base 56 description: 57 Input port node, single endpoint describing the input pad. 58 59 properties: 60 endpoint: 61 $ref: video-interfaces.yaml# 62 63 properties: 64 bus-type: 65 enum: [5, 6] 66 67 remote-endpoint: true 68 69 bus-width: 70 enum: [8, 9, 10, 11, 12] 71 default: 12 72 73 hsync-active: 74 enum: [0, 1] 75 default: 1 76 77 vsync-active: 78 enum: [0, 1] 79 default: 1 80 81 pclk-sample: 82 enum: [0, 1] 83 default: 1 84 85 required: 86 - remote-endpoint 87 - bus-type 88 89 additionalProperties: false 90 91 additionalProperties: false 92 93required: 94 - compatible 95 - reg 96 - clocks 97 - clock-names 98 - '#clock-cells' 99 - clock-output-names 100 - port 101 102additionalProperties: false 103 104examples: 105 - | 106 #include <dt-bindings/interrupt-controller/arm-gic.h> 107 #include <dt-bindings/clock/at91.h> 108 #include <dt-bindings/interrupt-controller/irq.h> 109 110 xisc: xisc@e1408000 { 111 compatible = "microchip,sama7g5-isc"; 112 reg = <0xe1408000 0x2000>; 113 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 114 clocks = <&pmc PMC_TYPE_PERIPHERAL 56>; 115 clock-names = "hclock"; 116 #clock-cells = <0>; 117 clock-output-names = "isc-mck"; 118 119 port { 120 xisc_in: endpoint { 121 bus-type = <5>; /* Parallel */ 122 remote-endpoint = <&csi2dc_out>; 123 hsync-active = <1>; 124 vsync-active = <1>; 125 bus-width = <12>; 126 }; 127 }; 128 }; 129