1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright (c) 2020 MediaTek Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9768.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Dongwoon Anatech DW9768 Voice Coil Motor (VCM) Lens Device Tree Bindings
9
10maintainers:
11  - Dongchun Zhu <dongchun.zhu@mediatek.com>
12
13description: |-
14  The Dongwoon DW9768 is a single 10-bit digital-to-analog (DAC) converter
15  with 100 mA output current sink capability. VCM current is controlled with
16  a linear mode driver. The DAC is controlled via a 2-wire (I2C-compatible)
17  serial interface that operates at clock rates up to 1MHz. This chip
18  integrates Advanced Actuator Control (AAC) technology and is intended for
19  driving voice coil lenses in camera modules.
20
21properties:
22  compatible:
23    enum:
24      - dongwoon,dw9768 # for DW9768 VCM
25      - giantec,gt9769  # for GT9769 VCM
26
27  reg:
28    maxItems: 1
29
30  vin-supply:
31    description:
32      Definition of the regulator used as Digital I/O voltage supply.
33
34  vdd-supply:
35    description:
36      Definition of the regulator used as Digital core voltage supply.
37
38  dongwoon,aac-mode:
39    description:
40      Indication of AAC mode select.
41    allOf:
42      - $ref: "/schemas/types.yaml#/definitions/uint32"
43      - enum:
44          - 1    #  AAC2 mode(operation time# 0.48 x Tvib)
45          - 2    #  AAC3 mode(operation time# 0.70 x Tvib)
46          - 3    #  AAC4 mode(operation time# 0.75 x Tvib)
47          - 5    #  AAC8 mode(operation time# 1.13 x Tvib)
48        default: 2
49
50  dongwoon,aac-timing:
51    description:
52      Number of AAC Timing count that controlled by one 6-bit period of
53      vibration register AACT[5:0], the unit of which is 100 us.
54    allOf:
55      - $ref: "/schemas/types.yaml#/definitions/uint32"
56      - default: 0x20
57        minimum: 0x00
58        maximum: 0x3f
59
60  dongwoon,clock-presc:
61    description:
62      Indication of VCM internal clock dividing rate select, as one multiple
63      factor to calculate VCM ring periodic time Tvib.
64    allOf:
65      - $ref: "/schemas/types.yaml#/definitions/uint32"
66      - enum:
67          - 0    #  Dividing Rate -  2
68          - 1    #  Dividing Rate -  1
69          - 2    #  Dividing Rate -  1/2
70          - 3    #  Dividing Rate -  1/4
71          - 4    #  Dividing Rate -  8
72          - 5    #  Dividing Rate -  4
73        default: 1
74
75required:
76  - compatible
77  - reg
78  - vin-supply
79  - vdd-supply
80
81additionalProperties: false
82
83examples:
84  - |
85
86    i2c {
87        #address-cells = <1>;
88        #size-cells = <0>;
89
90        dw9768: camera-lens@c {
91            compatible = "dongwoon,dw9768";
92            reg = <0x0c>;
93
94            vin-supply = <&mt6358_vcamio_reg>;
95            vdd-supply = <&mt6358_vcama2_reg>;
96            dongwoon,aac-timing = <0x39>;
97        };
98    };
99
100...
101