1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner H3 Deinterlace Device Tree Bindings
8
9maintainers:
10  - Jernej Skrabec <jernej.skrabec@siol.net>
11  - Chen-Yu Tsai <wens@csie.org>
12  - Maxime Ripard <mripard@kernel.org>
13
14description: |-
15  The Allwinner H3 and later has a deinterlace core used for
16  deinterlacing interlaced video content.
17
18properties:
19  compatible:
20    oneOf:
21      - const: allwinner,sun8i-h3-deinterlace
22      - items:
23        - const: allwinner,sun50i-a64-deinterlace
24        - const: allwinner,sun8i-h3-deinterlace
25
26  reg:
27    maxItems: 1
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    items:
34      - description: Deinterlace interface clock
35      - description: Deinterlace module clock
36      - description: Deinterlace DRAM clock
37
38  clock-names:
39    items:
40      - const: bus
41      - const: mod
42      - const: ram
43
44  resets:
45    maxItems: 1
46
47  interconnects:
48    maxItems: 1
49
50  interconnect-names:
51    const: dma-mem
52
53required:
54  - compatible
55  - reg
56  - interrupts
57  - clocks
58
59additionalProperties: false
60
61examples:
62  - |
63    #include <dt-bindings/interrupt-controller/arm-gic.h>
64    #include <dt-bindings/clock/sun8i-h3-ccu.h>
65    #include <dt-bindings/reset/sun8i-h3-ccu.h>
66
67    deinterlace: deinterlace@1400000 {
68        compatible = "allwinner,sun8i-h3-deinterlace";
69        reg = <0x01400000 0x20000>;
70        clocks = <&ccu CLK_BUS_DEINTERLACE>,
71                 <&ccu CLK_DEINTERLACE>,
72                 <&ccu CLK_DRAM_DEINTERLACE>;
73        clock-names = "bus", "mod", "ram";
74        resets = <&ccu RST_BUS_DEINTERLACE>;
75        interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
76        interconnects = <&mbus 9>;
77        interconnect-names = "dma-mem";
78    };
79
80...
81