1f78ed3c5SMaxime Ripard# SPDX-License-Identifier: GPL-2.0 2f78ed3c5SMaxime Ripard%YAML 1.2 3f78ed3c5SMaxime Ripard--- 4f78ed3c5SMaxime Ripard$id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml# 5f78ed3c5SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 6f78ed3c5SMaxime Ripard 7f78ed3c5SMaxime Ripardtitle: Allwinner A31 CMOS Sensor Interface (CSI) Device Tree Bindings 8f78ed3c5SMaxime Ripard 9f78ed3c5SMaxime Ripardmaintainers: 10f78ed3c5SMaxime Ripard - Chen-Yu Tsai <wens@csie.org> 11f78ed3c5SMaxime Ripard - Maxime Ripard <mripard@kernel.org> 12f78ed3c5SMaxime Ripard 13f78ed3c5SMaxime Ripardproperties: 14f78ed3c5SMaxime Ripard compatible: 15f78ed3c5SMaxime Ripard enum: 16f78ed3c5SMaxime Ripard - allwinner,sun6i-a31-csi 17f78ed3c5SMaxime Ripard - allwinner,sun8i-a83t-csi 18f78ed3c5SMaxime Ripard - allwinner,sun8i-h3-csi 19f78ed3c5SMaxime Ripard - allwinner,sun8i-v3s-csi 20f78ed3c5SMaxime Ripard - allwinner,sun50i-a64-csi 21f78ed3c5SMaxime Ripard 22f78ed3c5SMaxime Ripard reg: 23f78ed3c5SMaxime Ripard maxItems: 1 24f78ed3c5SMaxime Ripard 25f78ed3c5SMaxime Ripard interrupts: 26f78ed3c5SMaxime Ripard maxItems: 1 27f78ed3c5SMaxime Ripard 28f78ed3c5SMaxime Ripard clocks: 29f78ed3c5SMaxime Ripard items: 30f78ed3c5SMaxime Ripard - description: Bus Clock 31f78ed3c5SMaxime Ripard - description: Module Clock 32f78ed3c5SMaxime Ripard - description: DRAM Clock 33f78ed3c5SMaxime Ripard 34f78ed3c5SMaxime Ripard clock-names: 35f78ed3c5SMaxime Ripard items: 36f78ed3c5SMaxime Ripard - const: bus 37f78ed3c5SMaxime Ripard - const: mod 38f78ed3c5SMaxime Ripard - const: ram 39f78ed3c5SMaxime Ripard 40f78ed3c5SMaxime Ripard resets: 41f78ed3c5SMaxime Ripard maxItems: 1 42f78ed3c5SMaxime Ripard 43f78ed3c5SMaxime Ripard port: 44066a94e2SRob Herring $ref: /schemas/graph.yaml#/$defs/port-base 45*249106daSPaul Kocialkowski description: Parallel input port, connect to a parallel sensor 46f78ed3c5SMaxime Ripard 47f78ed3c5SMaxime Ripard properties: 48f78ed3c5SMaxime Ripard endpoint: 49066a94e2SRob Herring $ref: video-interfaces.yaml# 50066a94e2SRob Herring unevaluatedProperties: false 51f78ed3c5SMaxime Ripard 52f78ed3c5SMaxime Ripard properties: 53f78ed3c5SMaxime Ripard bus-width: 54f78ed3c5SMaxime Ripard enum: [ 8, 10, 12, 16 ] 55f78ed3c5SMaxime Ripard 56f78ed3c5SMaxime Ripard pclk-sample: true 57f78ed3c5SMaxime Ripard hsync-active: true 58f78ed3c5SMaxime Ripard vsync-active: true 59f78ed3c5SMaxime Ripard 60f78ed3c5SMaxime Ripard required: 61f78ed3c5SMaxime Ripard - bus-width 62f78ed3c5SMaxime Ripard 63*249106daSPaul Kocialkowski unevaluatedProperties: false 64*249106daSPaul Kocialkowski 65*249106daSPaul Kocialkowski ports: 66*249106daSPaul Kocialkowski $ref: /schemas/graph.yaml#/properties/ports 67*249106daSPaul Kocialkowski 68*249106daSPaul Kocialkowski properties: 69*249106daSPaul Kocialkowski port@0: 70*249106daSPaul Kocialkowski $ref: "#/properties/port" 71*249106daSPaul Kocialkowski 72*249106daSPaul Kocialkowski port@1: 73*249106daSPaul Kocialkowski $ref: /schemas/graph.yaml#/properties/port 74*249106daSPaul Kocialkowski description: MIPI CSI-2 bridge input port 75*249106daSPaul Kocialkowski 76*249106daSPaul Kocialkowski anyOf: 77*249106daSPaul Kocialkowski - required: 78*249106daSPaul Kocialkowski - port@0 79*249106daSPaul Kocialkowski - required: 80*249106daSPaul Kocialkowski - port@1 81f78ed3c5SMaxime Ripard 82f78ed3c5SMaxime Ripardrequired: 83f78ed3c5SMaxime Ripard - compatible 84f78ed3c5SMaxime Ripard - reg 85f78ed3c5SMaxime Ripard - interrupts 86f78ed3c5SMaxime Ripard - clocks 87f78ed3c5SMaxime Ripard - clock-names 88f78ed3c5SMaxime Ripard - resets 89f78ed3c5SMaxime Ripard 90*249106daSPaul KocialkowskioneOf: 91*249106daSPaul Kocialkowski - required: 92*249106daSPaul Kocialkowski - ports 93*249106daSPaul Kocialkowski - required: 94*249106daSPaul Kocialkowski - port 95*249106daSPaul Kocialkowski 96f78ed3c5SMaxime RipardadditionalProperties: false 97f78ed3c5SMaxime Ripard 98f78ed3c5SMaxime Ripardexamples: 99f78ed3c5SMaxime Ripard - | 100f78ed3c5SMaxime Ripard #include <dt-bindings/interrupt-controller/arm-gic.h> 101f78ed3c5SMaxime Ripard #include <dt-bindings/clock/sun8i-v3s-ccu.h> 102f78ed3c5SMaxime Ripard #include <dt-bindings/reset/sun8i-v3s-ccu.h> 103f78ed3c5SMaxime Ripard 104f78ed3c5SMaxime Ripard csi1: csi@1cb4000 { 105f78ed3c5SMaxime Ripard compatible = "allwinner,sun8i-v3s-csi"; 106f78ed3c5SMaxime Ripard reg = <0x01cb4000 0x1000>; 107f78ed3c5SMaxime Ripard interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 108f78ed3c5SMaxime Ripard clocks = <&ccu CLK_BUS_CSI>, 109f78ed3c5SMaxime Ripard <&ccu CLK_CSI1_SCLK>, 110f78ed3c5SMaxime Ripard <&ccu CLK_DRAM_CSI>; 111f78ed3c5SMaxime Ripard clock-names = "bus", 112f78ed3c5SMaxime Ripard "mod", 113f78ed3c5SMaxime Ripard "ram"; 114f78ed3c5SMaxime Ripard resets = <&ccu RST_BUS_CSI>; 115f78ed3c5SMaxime Ripard 116*249106daSPaul Kocialkowski ports { 117*249106daSPaul Kocialkowski #address-cells = <1>; 118*249106daSPaul Kocialkowski #size-cells = <0>; 119*249106daSPaul Kocialkowski 120*249106daSPaul Kocialkowski port@0 { 121*249106daSPaul Kocialkowski reg = <0>; 122f78ed3c5SMaxime Ripard /* Parallel bus endpoint */ 123f78ed3c5SMaxime Ripard csi1_ep: endpoint { 124f78ed3c5SMaxime Ripard remote-endpoint = <&adv7611_ep>; 125f78ed3c5SMaxime Ripard bus-width = <16>; 126f78ed3c5SMaxime Ripard 127f78ed3c5SMaxime Ripard /* 128f78ed3c5SMaxime Ripard * If hsync-active/vsync-active are missing, 129f78ed3c5SMaxime Ripard * embedded BT.656 sync is used. 130f78ed3c5SMaxime Ripard */ 131f78ed3c5SMaxime Ripard hsync-active = <0>; /* Active low */ 132f78ed3c5SMaxime Ripard vsync-active = <0>; /* Active low */ 133f78ed3c5SMaxime Ripard pclk-sample = <1>; /* Rising */ 134f78ed3c5SMaxime Ripard }; 135f78ed3c5SMaxime Ripard }; 136f78ed3c5SMaxime Ripard }; 137*249106daSPaul Kocialkowski }; 138f78ed3c5SMaxime Ripard 139f78ed3c5SMaxime Ripard... 140