1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Qualcomm APCS global block bindings 8 9description: 10 This binding describes the APCS "global" block found in various Qualcomm 11 platforms. 12 13maintainers: 14 - Sivaprakash Murugesan <sivaprak@codeaurora.org> 15 16properties: 17 compatible: 18 enum: 19 - qcom,ipq8074-apcs-apps-global 20 - qcom,msm8916-apcs-kpss-global 21 - qcom,msm8996-apcs-hmss-global 22 - qcom,msm8998-apcs-hmss-global 23 - qcom,qcs404-apcs-apps-global 24 - qcom,sc7180-apss-shared 25 - qcom,sdm845-apss-shared 26 - qcom,sm8150-apss-shared 27 28 reg: 29 maxItems: 1 30 31 clocks: 32 description: phandles to the parent clocks of the clock driver 33 items: 34 - description: primary pll parent of the clock driver 35 - description: auxiliary parent 36 37 '#mbox-cells': 38 const: 1 39 40 '#clock-cells': 41 const: 0 42 43 clock-names: 44 items: 45 - const: pll 46 - const: aux 47 48required: 49 - compatible 50 - reg 51 - '#mbox-cells' 52 53additionalProperties: false 54 55examples: 56 57 # Example apcs with msm8996 58 - | 59 #include <dt-bindings/interrupt-controller/arm-gic.h> 60 apcs_glb: mailbox@9820000 { 61 compatible = "qcom,msm8996-apcs-hmss-global"; 62 reg = <0x9820000 0x1000>; 63 64 #mbox-cells = <1>; 65 }; 66 67 rpm-glink { 68 compatible = "qcom,glink-rpm"; 69 interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>; 70 qcom,rpm-msg-ram = <&rpm_msg_ram>; 71 mboxes = <&apcs_glb 0>; 72 mbox-names = "rpm_hlos"; 73 }; 74 75 # Example apcs with qcs404 76 - | 77 #define GCC_APSS_AHB_CLK_SRC 1 78 #define GCC_GPLL0_AO_OUT_MAIN 123 79 apcs: mailbox@b011000 { 80 compatible = "qcom,qcs404-apcs-apps-global"; 81 reg = <0x0b011000 0x1000>; 82 #mbox-cells = <1>; 83 clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>; 84 clock-names = "pll", "aux"; 85 #clock-cells = <0>; 86 }; 87