17e0fc507SBenjamin Gaignard# SPDX-License-Identifier: GPL-2.0-only 27e0fc507SBenjamin Gaignard%YAML 1.2 37e0fc507SBenjamin Gaignard--- 47e0fc507SBenjamin Gaignard$id: http://devicetree.org/schemas/iommu/rockchip,iommu.yaml# 57e0fc507SBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml# 67e0fc507SBenjamin Gaignard 77e0fc507SBenjamin Gaignardtitle: Rockchip IOMMU 87e0fc507SBenjamin Gaignard 97e0fc507SBenjamin Gaignardmaintainers: 107e0fc507SBenjamin Gaignard - Heiko Stuebner <heiko@sntech.de> 117e0fc507SBenjamin Gaignard 127e0fc507SBenjamin Gaignarddescription: |+ 137e0fc507SBenjamin Gaignard A Rockchip DRM iommu translates io virtual addresses to physical addresses for 147e0fc507SBenjamin Gaignard its master device. Each slave device is bound to a single master device and 157e0fc507SBenjamin Gaignard shares its clocks, power domain and irq. 167e0fc507SBenjamin Gaignard 177e0fc507SBenjamin Gaignard For information on assigning IOMMU controller to its peripheral devices, 187e0fc507SBenjamin Gaignard see generic IOMMU bindings. 197e0fc507SBenjamin Gaignard 207e0fc507SBenjamin Gaignardproperties: 217e0fc507SBenjamin Gaignard compatible: 22*9e6f3cd5SBenjamin Gaignard enum: 23*9e6f3cd5SBenjamin Gaignard - rockchip,iommu 24*9e6f3cd5SBenjamin Gaignard - rockchip,rk3568-iommu 257e0fc507SBenjamin Gaignard 267e0fc507SBenjamin Gaignard reg: 277e0fc507SBenjamin Gaignard items: 287e0fc507SBenjamin Gaignard - description: configuration registers for MMU instance 0 297e0fc507SBenjamin Gaignard - description: configuration registers for MMU instance 1 307e0fc507SBenjamin Gaignard minItems: 1 317e0fc507SBenjamin Gaignard 327e0fc507SBenjamin Gaignard interrupts: 337e0fc507SBenjamin Gaignard items: 347e0fc507SBenjamin Gaignard - description: interruption for MMU instance 0 357e0fc507SBenjamin Gaignard - description: interruption for MMU instance 1 367e0fc507SBenjamin Gaignard minItems: 1 377e0fc507SBenjamin Gaignard 387e0fc507SBenjamin Gaignard clocks: 397e0fc507SBenjamin Gaignard items: 407e0fc507SBenjamin Gaignard - description: Core clock 417e0fc507SBenjamin Gaignard - description: Interface clock 427e0fc507SBenjamin Gaignard 437e0fc507SBenjamin Gaignard clock-names: 447e0fc507SBenjamin Gaignard items: 457e0fc507SBenjamin Gaignard - const: aclk 467e0fc507SBenjamin Gaignard - const: iface 477e0fc507SBenjamin Gaignard 487e0fc507SBenjamin Gaignard "#iommu-cells": 497e0fc507SBenjamin Gaignard const: 0 507e0fc507SBenjamin Gaignard 51*9e6f3cd5SBenjamin Gaignard power-domains: 52*9e6f3cd5SBenjamin Gaignard maxItems: 1 53*9e6f3cd5SBenjamin Gaignard 547e0fc507SBenjamin Gaignard rockchip,disable-mmu-reset: 557e0fc507SBenjamin Gaignard $ref: /schemas/types.yaml#/definitions/flag 567e0fc507SBenjamin Gaignard description: | 577e0fc507SBenjamin Gaignard Do not use the mmu reset operation. 587e0fc507SBenjamin Gaignard Some mmu instances may produce unexpected results 597e0fc507SBenjamin Gaignard when the reset operation is used. 607e0fc507SBenjamin Gaignard 617e0fc507SBenjamin Gaignardrequired: 627e0fc507SBenjamin Gaignard - compatible 637e0fc507SBenjamin Gaignard - reg 647e0fc507SBenjamin Gaignard - interrupts 657e0fc507SBenjamin Gaignard - clocks 667e0fc507SBenjamin Gaignard - clock-names 677e0fc507SBenjamin Gaignard - "#iommu-cells" 687e0fc507SBenjamin Gaignard 697e0fc507SBenjamin GaignardadditionalProperties: false 707e0fc507SBenjamin Gaignard 717e0fc507SBenjamin Gaignardexamples: 727e0fc507SBenjamin Gaignard - | 737e0fc507SBenjamin Gaignard #include <dt-bindings/clock/rk3399-cru.h> 747e0fc507SBenjamin Gaignard #include <dt-bindings/interrupt-controller/arm-gic.h> 757e0fc507SBenjamin Gaignard 767e0fc507SBenjamin Gaignard vopl_mmu: iommu@ff940300 { 777e0fc507SBenjamin Gaignard compatible = "rockchip,iommu"; 787e0fc507SBenjamin Gaignard reg = <0xff940300 0x100>; 797e0fc507SBenjamin Gaignard interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 807e0fc507SBenjamin Gaignard clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; 817e0fc507SBenjamin Gaignard clock-names = "aclk", "iface"; 827e0fc507SBenjamin Gaignard #iommu-cells = <0>; 837e0fc507SBenjamin Gaignard }; 84